diff --git a/libc/arch-mips/bionic/__dso_handle.S b/libc/arch-mips/bionic/__dso_handle.S
new file mode 100644
index 0000000..3e80128
--- /dev/null
+++ b/libc/arch-mips/bionic/__dso_handle.S
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2010 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+# The __dso_handle global variable is used by static
+# C++ constructors and destructors in the binary.
+# See http://www.codesourcery.com/public/cxx-abi/abi.html#dso-dtor
+#
+        .section .bss
+        .align 4
+
+#ifndef CRT_LEGACY_WORKAROUND
+	.hidden __dso_handle
+#endif
+
+        .globl __dso_handle
+__dso_handle:
+        .long 0
diff --git a/libc/arch-mips/bionic/__dso_handle_so.S b/libc/arch-mips/bionic/__dso_handle_so.S
new file mode 100644
index 0000000..77a5d7f
--- /dev/null
+++ b/libc/arch-mips/bionic/__dso_handle_so.S
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2010 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+# The __dso_handle global variable is used by static
+# C++ constructors and destructors in the binary.
+# See http://www.codesourcery.com/public/cxx-abi/abi.html#dso-dtor
+#
+	.data
+        .align 4
+	.hidden __dso_handle
+        .globl __dso_handle
+__dso_handle:
+        .long __dso_handle
diff --git a/libc/arch-mips/bionic/__get_sp.S b/libc/arch-mips/bionic/__get_sp.S
new file mode 100644
index 0000000..834c89d
--- /dev/null
+++ b/libc/arch-mips/bionic/__get_sp.S
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+	.text
+
+/* void *__get_sp(void) */
+
+	.type	__get_sp, @function
+	.global	__get_sp
+	.align	4
+	.ent	__get_sp
+__get_sp:
+	move	$v0, $sp
+	j	$ra
+	.end	__get_sp
diff --git a/libc/arch-mips/bionic/__get_tls.c b/libc/arch-mips/bionic/__get_tls.c
new file mode 100644
index 0000000..d1cdf0e
--- /dev/null
+++ b/libc/arch-mips/bionic/__get_tls.c
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+void*   __get_tls(void)
+{
+  register void  *tls asm("v1");
+  asm (".set push\n\t"
+       ".set mips32r2\n\t"
+       "rdhwr %0,$29\n\t"
+       ".set pop"
+       : "=r"(tls));
+  return tls;
+}
diff --git a/libc/arch-mips/bionic/__set_tls.c b/libc/arch-mips/bionic/__set_tls.c
new file mode 100644
index 0000000..38e3a50
--- /dev/null
+++ b/libc/arch-mips/bionic/__set_tls.c
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#include <pthread.h>
+
+extern int __set_thread_area(void *u_info);
+
+int __set_tls(void *ptr)
+{
+    return __set_thread_area(ptr);
+}
diff --git a/libc/arch-mips/bionic/_exit_with_stack_teardown.S b/libc/arch-mips/bionic/_exit_with_stack_teardown.S
new file mode 100644
index 0000000..9974e84
--- /dev/null
+++ b/libc/arch-mips/bionic/_exit_with_stack_teardown.S
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <asm/unistd.h>
+
+	.text
+
+/* void _exit_with_stack_teardown(void * stackBase, int stackSize, int retCode) */
+
+	.type	_exit_with_stack_teardown, @function
+	.global	_exit_with_stack_teardown
+	.align	4
+	.ent	_exit_with_stack_teardown
+_exit_with_stack_teardown:
+	move	$s0,$a2		/* preserve retCode for exit() call */
+
+	li	$v0,__NR_munmap
+	syscall			/* the stack is destroyed by this call */
+	move	$a0,$s0
+	li	$v0,__NR_exit
+	syscall
+
+	/* exit() should never return, cause a crash if it does */
+	move	$a0,$0
+	lw	$a0,($a0)
+	.end	_exit_with_stack_teardown
diff --git a/libc/arch-mips/bionic/_setjmp.S b/libc/arch-mips/bionic/_setjmp.S
new file mode 100644
index 0000000..e7083ae
--- /dev/null
+++ b/libc/arch-mips/bionic/_setjmp.S
@@ -0,0 +1,188 @@
+/*	$OpenBSD: _setjmp.S,v 1.4 2005/08/07 16:40:15 espie Exp $ */
+
+/*
+ * Copyright (c) 2002 Opsycon AB  (www.opsycon.se / www.opsycon.com)
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Opsycon AB nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <machine/asm.h>
+#include <machine/regnum.h>
+#include <machine/signal.h>
+
+/*
+ * _setjmp, _longjmp (not restoring signal state)
+ *
+ * XXX FPSET should probably be taken from SR setting. hmmm...
+ *  GPOFF and FRAMESIZE must be the same for both _setjmp and _longjmp!
+ *
+ */
+
+FRAMESZ= MKFSIZ(0,4)
+GPOFF= FRAMESZ-2*REGSZ
+
+#define FPREG64_S(FPR, OFF, BASE)       \
+        swc1    FPR, OFF(BASE)  ;       \
+        mfhc1   t0, FPR         ;       \
+        sw      t0, OFF+4(BASE) ;
+        
+#define FPREG64_L(FPR, OFF, BASE)       \
+        lw      t0, OFF+4(BASE) ;       \
+        lw      t1, OFF(BASE)   ;       \
+        mtc1    t1, FPR         ;       \
+        mthc1   t0, FPR         ;       \
+        
+LEAF(_setjmp, FRAMESZ)
+	PTR_SUBU sp, FRAMESZ
+	SETUP_GP64(GPOFF, _setjmp)
+	SAVE_GP(GPOFF)
+	.set	noreorder
+#if defined(__mips64)
+	dli	v0, 0xACEDBADE			# sigcontext magic number
+#else
+	li	v0, 0xACEDBADE			# sigcontext magic number
+#endif
+	REG_S	v0, SC_REGS+ZERO*REGSZ(a0)
+	REG_S	s0, SC_REGS+S0*REGSZ(a0)
+	REG_S	s1, SC_REGS+S1*REGSZ(a0)
+	REG_S	s2, SC_REGS+S2*REGSZ(a0)
+	REG_S	s3, SC_REGS+S3*REGSZ(a0)
+	REG_S	s4, SC_REGS+S4*REGSZ(a0)
+	REG_S	s5, SC_REGS+S5*REGSZ(a0)
+	REG_S	s6, SC_REGS+S6*REGSZ(a0)
+	REG_S	s7, SC_REGS+S7*REGSZ(a0)
+	REG_S	s8, SC_REGS+S8*REGSZ(a0)
+	REG_L	v0, GPOFF(sp)
+	REG_S	v0, SC_REGS+GP*REGSZ(a0)
+	PTR_ADDU v0, sp, FRAMESZ
+	REG_S	v0, SC_REGS+SP*REGSZ(a0)
+	REG_S	ra, SC_PC(a0)
+
+#if !defined(SOFTFLOAT)
+	li	v0, 1				# be nice if we could tell
+	REG_S	v0, SC_FPUSED(a0)		# sc_fpused = 1
+	cfc1	v0, $31
+#if _MIPS_FPSET == 32
+        FPREG64_S($f20, SC_FPREGS+((F20-F0)*REGSZ_FP), a0)
+        FPREG64_S($f21, SC_FPREGS+((F21-F0)*REGSZ_FP), a0)
+        FPREG64_S($f22, SC_FPREGS+((F22-F0)*REGSZ_FP), a0)
+        FPREG64_S($f23, SC_FPREGS+((F23-F0)*REGSZ_FP), a0)
+        FPREG64_S($f24, SC_FPREGS+((F24-F0)*REGSZ_FP), a0)
+        FPREG64_S($f25, SC_FPREGS+((F25-F0)*REGSZ_FP), a0)
+        FPREG64_S($f26, SC_FPREGS+((F26-F0)*REGSZ_FP), a0)
+        FPREG64_S($f27, SC_FPREGS+((F27-F0)*REGSZ_FP), a0)
+        FPREG64_S($f28, SC_FPREGS+((F28-F0)*REGSZ_FP), a0)
+        FPREG64_S($f29, SC_FPREGS+((F29-F0)*REGSZ_FP), a0)
+        FPREG64_S($f30, SC_FPREGS+((F30-F0)*REGSZ_FP), a0)
+        FPREG64_S($f31, SC_FPREGS+((F31-F0)*REGSZ_FP), a0)
+#else
+        swc1    $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
+        swc1    $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
+        swc1    $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
+        swc1    $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
+        swc1    $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
+        swc1    $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
+        swc1    $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
+        swc1    $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
+        swc1    $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
+        swc1    $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
+        swc1    $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
+        swc1    $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
+#endif
+	REG_S	v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
+#endif /* !SOFTFLOAT */
+	RESTORE_GP64
+	PTR_ADDU sp, FRAMESZ
+	j	ra
+	 move	v0, zero
+END(_setjmp)
+
+LEAF(_longjmp, FRAMESZ)
+	PTR_SUBU sp, FRAMESZ
+	SETUP_GP64(GPOFF, _longjmp)
+	SAVE_GP(GPOFF)
+	.set    noreorder
+	REG_L	v0, SC_REGS+ZERO*REGSZ(a0)
+	bne	v0, 0xACEDBADE, botch		# jump if error
+	REG_L	ra, SC_PC(a0)
+	REG_L	v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
+	REG_L	s0, SC_REGS+S0*REGSZ(a0)
+	REG_L	s1, SC_REGS+S1*REGSZ(a0)
+	REG_L	s2, SC_REGS+S2*REGSZ(a0)
+	REG_L	s3, SC_REGS+S3*REGSZ(a0)
+	REG_L	s4, SC_REGS+S4*REGSZ(a0)
+	REG_L	s5, SC_REGS+S5*REGSZ(a0)
+	REG_L	s6, SC_REGS+S6*REGSZ(a0)
+	REG_L	s7, SC_REGS+S7*REGSZ(a0)
+	REG_L	s8, SC_REGS+S8*REGSZ(a0)
+	REG_L	gp, SC_REGS+GP*REGSZ(a0)
+	REG_L	sp, SC_REGS+SP*REGSZ(a0)
+#if !defined(SOFTFLOAT)
+	ctc1	v0, $31
+#if _MIPS_FPSET == 32
+        FPREG64_L($f20, SC_FPREGS+((F20-F0)*REGSZ_FP), a0)
+        FPREG64_L($f21, SC_FPREGS+((F21-F0)*REGSZ_FP), a0)
+        FPREG64_L($f22, SC_FPREGS+((F22-F0)*REGSZ_FP), a0)
+        FPREG64_L($f23, SC_FPREGS+((F23-F0)*REGSZ_FP), a0)
+        FPREG64_L($f24, SC_FPREGS+((F24-F0)*REGSZ_FP), a0)
+        FPREG64_L($f25, SC_FPREGS+((F25-F0)*REGSZ_FP), a0)
+        FPREG64_L($f26, SC_FPREGS+((F26-F0)*REGSZ_FP), a0)
+        FPREG64_L($f27, SC_FPREGS+((F27-F0)*REGSZ_FP), a0)
+        FPREG64_L($f28, SC_FPREGS+((F28-F0)*REGSZ_FP), a0)
+        FPREG64_L($f29, SC_FPREGS+((F29-F0)*REGSZ_FP), a0)
+        FPREG64_L($f30, SC_FPREGS+((F30-F0)*REGSZ_FP), a0)
+        FPREG64_L($f31, SC_FPREGS+((F31-F0)*REGSZ_FP), a0)
+#else
+        lwc1    $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
+        lwc1    $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
+        lwc1    $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
+        lwc1    $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
+        lwc1    $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
+        lwc1    $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
+        lwc1    $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
+        lwc1    $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
+        lwc1    $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
+        lwc1    $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
+        lwc1    $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
+        lwc1    $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
+#endif
+#endif /* !SOFTFLOAT */
+	bne	a1, zero, 1f
+	 nop
+	li	a1, 1			# never return 0!
+1:
+	j	ra
+	 move	v0, a1
+
+botch:
+	jal	longjmperror
+	nop
+	jal	abort
+	nop
+	RESTORE_GP64
+	PTR_ADDU sp, FRAMESZ
+END(_longjmp)
+
diff --git a/libc/arch-mips/bionic/atexit.S b/libc/arch-mips/bionic/atexit.S
new file mode 100644
index 0000000..7f0c820
--- /dev/null
+++ b/libc/arch-mips/bionic/atexit.S
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+	.text
+	.globl	atexit
+	.hidden	atexit
+	.type	atexit, @function
+	.align  4
+	.ent	atexit
+atexit:
+	.set	noreorder
+	.cpload	$t9
+	.set	reorder
+	la	$t9, __cxa_atexit
+	move	$a1, $0
+	la      $a2, __dso_handle
+	j	$t9
+	.size	atexit, .-atexit
+	.end	atexit
diff --git a/libc/arch-mips/bionic/bzero.S b/libc/arch-mips/bionic/bzero.S
new file mode 100644
index 0000000..6739345
--- /dev/null
+++ b/libc/arch-mips/bionic/bzero.S
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+	.text
+
+/*
+ * void bzero(void *s, size_t n);
+ */
+	.type	bzero, @function
+	.global	bzero
+	.align	4
+	.ent	bzero
+	.set	noreorder
+bzero:
+	.cpload	$t9
+	move	$a2,$a1
+	la	$t9,memset
+	j	$t9
+	 move	$a1,$zero
+	.end	bzero
+
diff --git a/libc/arch-mips/bionic/cacheflush.c b/libc/arch-mips/bionic/cacheflush.c
new file mode 100644
index 0000000..05085b6
--- /dev/null
+++ b/libc/arch-mips/bionic/cacheflush.c
@@ -0,0 +1,101 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#include <unistd.h>
+#include <sys/cachectl.h>
+
+#ifdef DEBUG
+#include <logd.h>
+#define  XLOG(...)   \
+	__libc_android_log_print(ANDROID_LOG_DEBUG,"libc-cacheflush",__VA_ARGS__)
+#endif
+
+/*
+ * Linux historically defines a cacheflush(3) routine for MIPS
+ * with this signature:
+ * int cacheflush(char *addr, int nbytes, int cache);
+ *
+ * Android defines an alternate cacheflush routine which exposes the
+ * ARM system call interface:
+ * int cacheflush (long start, long end, long flags)
+ *
+ * This is an attempt to maintain compatibility between the historical MIPS
+ * usage for software previously ported to MIPS and Android specific
+ * uses of cacheflush()
+ *
+ * Use the gcc __clear_cache builtin if possible. This will generate inline synci
+ * instructions if available or call _flush_cache(start, len, BCACHE) directly
+ */
+
+#if defined (__GNUC__)
+#define GCC_VERSION ((__GNUC__*10000) + __GNUC_MINOR__*100 + __GNUC_PATCHLEVEL__)
+#endif
+
+/* This is the Android signature */
+int cacheflush (long start, long end, long flags)
+{
+	if (end < start) {
+		/*
+		 * It looks like this is really MIPS style cacheflush call
+		 * start => addr
+		 * end => nbytes
+		 */
+#ifdef DEBUG
+		static int warned = 0;
+		if (!warned) {
+			XLOG("called with (start,len) instead of (start,end)");
+			warned = 1;
+		}
+#endif
+		end += start;
+	}
+
+#if !defined(ARCH_MIPS_USE_FLUSHCACHE_SYSCALL) && \
+	defined(GCC_VERSION) && (GCC_VERSION >= 40300)
+
+#if (__mips_isa_rev >= 2) && (GCC_VERSION < 40403)
+	/*
+	 * Modify "start" and "end" to avoid GCC 4.3.0-4.4.2 bug in
+	 * mips_expand_synci_loop that may execute synci one more time.
+	 * "start" points to the first byte of the cache line.
+	 * "end" points to the last byte of the line before the last cache line.
+	 * Because size is always a multiple of 4, this is safe to set
+	 * "end" to the last byte.
+	 */
+	{
+		int lineSize;
+		asm("rdhwr %0, $1" : "=r" (lineSize));
+		start = start & (-lineSize);
+		end = (end & (-lineSize)) - 1;
+	}
+#endif
+	__builtin___clear_cache((char *)start, (char *)end);
+#else
+	_flush_cache((char *)start, end-start, BCACHE);
+#endif
+	return 0;
+}
diff --git a/libc/arch-mips/bionic/clone.S b/libc/arch-mips/bionic/clone.S
new file mode 100644
index 0000000..30fef8d
--- /dev/null
+++ b/libc/arch-mips/bionic/clone.S
@@ -0,0 +1,145 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#include <linux/sched.h>
+#include <sys/linux-syscalls.h>
+#include <linux/errno.h>
+        
+	.text
+	.type __pthread_clone, @function
+	.global __pthread_clone
+	.align 4
+        .ent __pthread_clone
+        
+/*
+ * int __pthread_clone(int (*fn)(void*), void *child_stack,
+ *			 int flags, void *arg);
+ */
+
+__pthread_clone:
+        .set	noreorder
+        .cpload $t9
+        .set	reorder
+
+	# set up child stack
+	subu	$a1,16
+	sw	$a0,0($a1)	# fn
+	sw	$a3,4($a1)	# arg
+#	sw	$a1+16,8($a1)	# tls
+
+	/*
+	 * int sys_clone(int flags, void *child_stack, int *parent_tidptr,
+	 *	 struct user_desc *newtls, int *child_tidptr);
+	 */
+
+	move	$a0,$a2		# flags
+#	move	$a1,$a1		# child_stack
+	move	$a2,$0		# parent_tidptr
+	move	$a3,$0		# user_desc
+	and	$a0,~(CLONE_CHILD_SETTID | CLONE_CHILD_CLEARTID)
+				# make sure the kernel doesn't access child_tidptr
+
+        li	$v0,__NR_clone
+        syscall
+
+        bnez	$a3,.L__error
+
+        beqz	$v0,.L__thread_start
+        
+        j $ra
+
+.L__thread_start:
+        lw	$a0,0($sp)	#  fn
+        lw	$a1,4($sp)	#  arg
+        addu	$a2,$sp,16	#  tls
+
+	# void __thread_entry(int (*func)(void*), void *arg, void *tls)
+        la	$t9, __thread_entry
+        j	$t9
+
+.L__error:
+	move	$a0,$v0
+	la	$t9,__set_errno
+	j	$t9
+
+        .end __pthread_clone
+
+
+    #
+    # This function is defined as:
+    #
+    #   pid_t  __bionic_clone( int  flags, void *child_stack,
+    #                          pid_t *pid, void *tls, pid_t *ctid,
+    #                          int  (*fn)(void *), void* arg );
+    #
+    # NOTE: This is not the same signature than the GLibc
+    #       __clone function here !! Placing 'fn' and 'arg'
+    #       at the end of the parameter list makes the
+    #       implementation much simpler.
+    #
+	.text
+	.type __bionic_clone, @function
+	.global __bionic_clone
+	.align 4
+        .ent __bionic_clone
+__bionic_clone:
+        .set	noreorder
+        .cpload $t9
+        .set	reorder
+
+	# set up child stack
+	subu	$a1,16
+	lw	$t0,20($sp)     # fn
+	lw	$t1,24($sp)     # arg
+	sw	$t0,0($a1)	# fn
+	sw	$t1,4($a1)	# arg
+
+	# remainder of arguments are correct for clone system call
+        li	$v0,__NR_clone
+        syscall
+
+        bnez	$a3,.L__error_bc
+
+        beqz	$v0,.L__thread_start_bc
+        
+        j $ra
+
+.L__thread_start_bc:
+        lw	$a0,0($sp)	#  fn
+        lw	$a1,4($sp)	#  arg
+
+	# void __bionic_clone_entry(int (*func)(void*), void *arg)
+        la	$t9,__bionic_clone_entry
+        j	$t9
+
+.L__error_bc:
+	move	$a0,$v0
+	la	$t9,__set_errno
+	j	$t9
+
+        .end __bionic_clone
+	
diff --git a/libc/arch-mips/bionic/crtbegin.S b/libc/arch-mips/bionic/crtbegin.S
new file mode 100644
index 0000000..d85d52c
--- /dev/null
+++ b/libc/arch-mips/bionic/crtbegin.S
@@ -0,0 +1,160 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+	.text
+	.align 4
+	.type __start,@function
+	.globl __start
+	.globl _start
+
+# this is the small startup code that is first run when
+# any executable that is statically-linked with Bionic
+# runs.
+#
+# it's purpose is to call __libc_init with appropriate
+# arguments, which are:
+#
+#    - the address of the raw data block setup by the Linux
+#      kernel ELF loader
+#
+#    - address of an "onexit" function, not used on any
+#      platform supported by Bionic
+#
+#    - address of the "main" function of the program.
+#
+#    - address of the constructor list
+#
+
+	.ent	__start
+__start:	
+_start:
+	bal	1f
+1:
+	.set	noreorder
+	.cpload	$ra
+	.set	reorder
+
+	move	$a0, $sp
+	move	$a1, $0
+	la	$a2, main
+	la	$a3, 1f
+	subu	$sp, 32
+	la	$t9, __libc_init
+	j	$t9
+	.end	__start
+
+1:	.long	__PREINIT_ARRAY__
+	.long	__INIT_ARRAY__
+	.long	__FINI_ARRAY__
+	.long	__CTOR_LIST__
+	.long	__DTOR_LIST__
+
+	.section .preinit_array, "aw"
+	.type __PREINIT_ARRAY__, @object
+	.globl __PREINIT_ARRAY__
+__PREINIT_ARRAY__:
+	.long -1
+
+	.section .init_array, "aw"
+	.type __INIT_ARRAY__, @object
+	.globl __INIT_ARRAY__
+__INIT_ARRAY__:
+	.long -1
+
+	.section .fini_array, "aw"
+	.type __FINI_ARRAY__, @object
+	.globl __FINI_ARRAY__
+__FINI_ARRAY__:
+	.long -1
+	.long __do_global_dtors_aux
+
+	.section .ctors, "aw"
+	.type __CTOR_LIST__, @object
+	.globl __CTOR_LIST__
+__CTOR_LIST__:
+	.long -1
+
+	.section .dtors, "aw"
+	.type __DTOR_LIST__, @object
+	.globl __DTOR_LIST__
+__DTOR_LIST__:
+	.long -1
+
+	.abicalls
+	.text
+	.align	2
+	.set	nomips16
+	.ent	__do_global_dtors_aux
+	.type	__do_global_dtors_aux, @function
+__do_global_dtors_aux:
+	.frame	$sp,32,$31		# vars= 0, regs= 1/0, args= 16, gp= 8
+	.mask	0x80000000,-4
+	.fmask	0x00000000,0
+	.set	noreorder
+	.cpload	$25
+	.set	nomacro
+	addiu	$sp,$sp,-32
+	sw	$31,28($sp)
+	.cprestore	16
+	lw	$2,%got(completed.1269)($28)
+	lbu	$2,%lo(completed.1269)($2)
+	bne	$2,$0,$L8
+	nop
+
+$L4:
+	lw	$2,%got(__cxa_finalize)($28)
+	beq	$2,$0,$L6
+	nop
+
+	lw	$2,%got(__dso_handle)($28)
+	lw	$4,0($2)
+	lw	$25,%call16(__cxa_finalize)($28)
+	.reloc	1f,R_MIPS_JALR,__cxa_finalize
+1:	jalr	$25
+	nop
+
+	lw	$28,16($sp)
+$L6:
+	lw	$2,%got(completed.1269)($28)
+	li	$3,1			# 0x1
+	sb	$3,%lo(completed.1269)($2)
+$L8:
+	lw	$31,28($sp)
+	addiu	$sp,$sp,32
+	j	$31
+	nop
+
+	.set	macro
+	.set	reorder
+	.end	__do_global_dtors_aux
+	.size	__do_global_dtors_aux, .-__do_global_dtors_aux
+	.local	completed.1269
+	.comm	completed.1269,1,1
+	.weak	__cxa_finalize
+
+#include "__dso_handle.S"
+#include "atexit.S"
diff --git a/libc/arch-mips/bionic/crtbegin_so.S b/libc/arch-mips/bionic/crtbegin_so.S
new file mode 100644
index 0000000..377888a
--- /dev/null
+++ b/libc/arch-mips/bionic/crtbegin_so.S
@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+	.section .init_array, "aw"
+	.type __INIT_ARRAY__, @object
+	.globl __INIT_ARRAY__
+__INIT_ARRAY__:
+	.long -1
+
+	.section .fini_array, "aw"
+	.type __FINI_ARRAY__, @object
+	.globl __FINI_ARRAY__
+__FINI_ARRAY__:
+	.long -1
+	.long __do_global_dtors_aux
+
+	.abicalls
+	.text
+	.align	2
+	.set	nomips16
+	.ent	__do_global_dtors_aux
+	.type	__do_global_dtors_aux, @function
+__do_global_dtors_aux:
+	.frame	$sp,32,$31		# vars= 0, regs= 1/0, args= 16, gp= 8
+	.mask	0x80000000,-4
+	.fmask	0x00000000,0
+	.set	noreorder
+	.cpload	$25
+	.set	nomacro
+	addiu	$sp,$sp,-32
+	sw	$31,28($sp)
+	.cprestore	16
+	lw	$2,%got(completed.1269)($28)
+	lbu	$2,%lo(completed.1269)($2)
+	bne	$2,$0,$L8
+	nop
+
+$L4:
+	lw	$2,%got(__cxa_finalize)($28)
+	beq	$2,$0,$L6
+	nop
+
+	lw	$2,%got(__dso_handle)($28)
+	lw	$4,0($2)
+	lw	$25,%call16(__cxa_finalize)($28)
+	.reloc	1f,R_MIPS_JALR,__cxa_finalize
+1:	jalr	$25
+	nop
+
+	lw	$28,16($sp)
+$L6:
+	lw	$2,%got(completed.1269)($28)
+	li	$3,1			# 0x1
+	sb	$3,%lo(completed.1269)($2)
+$L8:
+	lw	$31,28($sp)
+	addiu	$sp,$sp,32
+	j	$31
+	nop
+
+	.set	macro
+	.set	reorder
+	.end	__do_global_dtors_aux
+	.size	__do_global_dtors_aux, .-__do_global_dtors_aux
+	.local	completed.1269
+	.comm	completed.1269,1,1
+	.weak	__cxa_finalize
+
+#include "__dso_handle_so.S"
+#include "atexit.S"
diff --git a/libc/arch-mips/bionic/crtend.S b/libc/arch-mips/bionic/crtend.S
new file mode 100644
index 0000000..7a319be
--- /dev/null
+++ b/libc/arch-mips/bionic/crtend.S
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+	
+	.section .preinit_array, "aw"
+	.long 0
+
+	.section .init_array, "aw"
+	.long 0
+
+	.section .fini_array, "aw"
+	.long 0
+
+	.section .ctors, "aw"
+	.type __CTOR_END__, @object
+__CTOR_END__:
+	.long 0
+
+	.section .dtors, "aw"
+	.type __DTOR_END__, @object
+__DTOR_END__:
+	.long 0
+
diff --git a/libc/arch-mips/bionic/crtend_so.S b/libc/arch-mips/bionic/crtend_so.S
new file mode 100644
index 0000000..f09c427
--- /dev/null
+++ b/libc/arch-mips/bionic/crtend_so.S
@@ -0,0 +1,5 @@
+	.section .init_array, "aw"
+	.long 0
+
+	.section .fini_array, "aw"
+	.long 0
diff --git a/libc/arch-mips/bionic/ffs.S b/libc/arch-mips/bionic/ffs.S
new file mode 100644
index 0000000..ef38b2a
--- /dev/null
+++ b/libc/arch-mips/bionic/ffs.S
@@ -0,0 +1,92 @@
+/*	$NetBSD: ffs.S,v 1.5 2003/04/05 23:08:52 bjh21 Exp $	*/
+/*
+ * Copyright (c) 2001 Christopher Gilbert
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company nor the name of the author may be used to
+ *    endorse or promote products derived from this software without specific
+ *    prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * ffs - find first set bit, this algorithm isolates the first set
+ * bit, then multiplies the number by 0x0450fbaf which leaves the top
+ * 6 bits as an index into the table.  This algorithm should be a win
+ * over the checking each bit in turn as per the C compiled version.
+ *
+ * This is the ffs algorithm devised by d.seal and posted to comp.sys.arm on
+ * 16 Feb 1994.
+ */
+
+	.text
+
+	.ent	ffs
+	.type	ffs, @function
+	.global	ffs
+	.align	4
+	.set noreorder
+ffs:
+#if (__mips==32)
+	subu	$t0,$0,$a0
+	and	$a0,$t0
+	clz	$t0,$a0
+	li	$v0,32
+	j	$ra	
+	 subu	$v0,$t0
+#else
+/* Size of the ffs routine in bytes
+ * This is used to index .L_ffs_table from $t9
+ * FIXME: there must be a better way to do this
+ */
+#define FFSSIZE	12*4
+	subu	$t0,$0,$a0
+	and	$a0,$t0
+	/*
+	 * now a0 has at most one set bit, call this X
+	 * if X = 0, all further instructions are skipped
+	 */
+	sll	$t0,$a0,4	/* t0 = X * 0x00000010 */
+	or	$a0,$t0		/* a0 = X * 0x00000011 */ 
+	sll	$t0,$a0,6	/* t0 = X * 0x00000440 */
+	or	$a0,$t0		/* a0 = X * 0x00000451 */
+	sll	$t0,$a0,16	/* t0 = X * 0x04510000 */
+	subu	$a0,$t0,$a0	/* a0 = X * 0x0450fbaf */
+	
+	/* now lookup in table indexed on top 6 bits of a0 */
+	srl	$a0,25
+	addu	$t9,$a0
+	j	$ra
+	 lbu	$v0,FFSSIZE($t9)
+.L_ffs_table:
+/*               0   1   2   3   4   5   6   7           */
+	.byte	 0,  1,  2, 13,  3,  7,  0, 14  /*  0- 7 */
+	.byte	 4,  0,  8,  0,  0,  0,  0, 15  /*  8-15 */
+	.byte	11,  5,  0,  0,  9,  0,  0, 26  /* 16-23 */
+	.byte	 0,  0,  0,  0,  0, 22, 28, 16  /* 24-31 */
+	.byte	32, 12,  6,  0,  0,  0,  0,  0	/* 32-39 */
+	.byte	10,  0,  0, 25,  0,  0, 21, 27  /* 40-47 */
+	.byte	31,  0,  0,  0,  0, 24,  0, 20  /* 48-55 */
+	.byte   30,  0, 23, 19, 29, 18, 17,  0  /* 56-63 */
+	
+#endif
+	.end	ffs
diff --git a/libc/arch-mips/bionic/futex_mips.S b/libc/arch-mips/bionic/futex_mips.S
new file mode 100644
index 0000000..2a953ca
--- /dev/null
+++ b/libc/arch-mips/bionic/futex_mips.S
@@ -0,0 +1,142 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <asm/unistd.h>
+
+#define FUTEX_WAIT 0
+#define FUTEX_WAKE 1
+
+/*
+ * __futex_wait(*ftx, val, *timespec)
+ * futex_syscall(*ftx, op, val, *timespec, *addr2, val3)
+ */
+	.type	__futex_wait, @function
+	.global	__futex_wait
+	.align	4
+	.ent	__futex_wait
+__futex_wait:
+	subu	$sp,4*6
+	sw	$0,20($sp)	/* val3 */
+	sw	$0,16($sp)	/* addr2 */
+	move	$a3,$a2		/* timespec */
+	move	$a2,$a1		/* val */
+	li	$a1,FUTEX_WAIT	/* op */
+#	move	$a0,$a0		/* ftx */
+	li	$v0,__NR_futex
+	syscall
+	.set noreorder
+	bnez	$a3, 1f		/* Check for error */
+         neg	$v0		/* Negate error number if it's valid */
+	move	$v0,$0		/* Otherwise return 0 */
+1:
+	.set reorder
+	addu	$sp,4*6
+	j	$ra
+	.end	__futex_wait
+
+/*
+ * int __futex_wake(volatile void *ftx, int count)
+ * int futex_syscall(*ftx, op, val, *timespec, *addr2, val3)
+ */
+	.type	__futex_wake, @function
+	.globl	__futex_wake
+	.align	4
+	.ent	__futex_wake
+__futex_wake:
+	subu	$sp,4*6
+	sw	$0,20($sp)	/* val3 */
+	sw	$0,16($sp)	/* addr2 */
+	move	$a3,$0		/* timespec */
+	move	$a2,$a1		/* val */
+	li	$a1,FUTEX_WAKE	/* op */
+#	move	$a0,$a0		/* ftx */
+	li	$v0,__NR_futex
+	syscall
+	.set noreorder
+	bnez	$a3, 1f		/* Check for error */
+         neg	$v0		/* Negate error number if it's valid */
+	move	$v0,$0		/* Otherwise return 0 */
+1:
+	.set reorder
+	addu	$sp,4*6
+	j	$ra
+	.end	__futex_wake
+
+/* __futex_syscall3(*ftx, op, val)
+ * futex_syscall(*ftx, op, val, *timespec, *addr2, val3)
+ */
+	.type	__futex_syscall3, @function
+	.global	__futex_syscall3
+	.align	4
+	.ent	__futex_syscall3
+__futex_syscall3:
+	subu	$sp,4*6
+	sw	$0,20($sp)	/* val3 */
+	sw	$0,16($sp)	/* addr2 */
+	move	$a3,$0		/* timespec */
+#	move	$a2,$a2		/* val */
+#	li	$a1,$a1		/* op */
+#	move	$a0,$a0		/* ftx */
+	li	$v0,__NR_futex
+	syscall
+	.set noreorder
+	bnez	$a3, 1f		/* Check for error */
+         neg	$v0		/* Negate error number if it's valid */
+	move	$v0,$0		/* Otherwise return 0 */
+1:
+	.set reorder
+	addu	$sp,4*6
+	j	$ra
+	.end	__futex_syscall3
+
+/* __futex_syscall4(*ftx, op, val)
+ * futex_syscall(*ftx, op, val, *timespec, *addr2, val3)
+ */
+	.type	__futex_syscall4, @function
+	.global	__futex_syscall4
+	.align	4
+	.ent	__futex_syscall4
+__futex_syscall4:
+	subu	$sp,4*6
+	sw	$0,20($sp)	/* val3 */
+	sw	$0,16($sp)	/* addr2 */
+#	move	$a3,$a3		/* timespec */
+#	move	$a2,$a2		/* val */
+#	li	$a1,$a1		/* op */
+#	move	$a0,$a0		/* ftx */
+	li	$v0,__NR_futex
+	syscall
+	.set noreorder
+	bnez	$a3, 1f		/* Check for error */
+         neg	$v0		/* Negate error number if it's valid */
+	move	$v0,$0		/* Otherwise return 0 */
+1:
+	.set reorder
+	addu	$sp,4*6
+	j	$ra
+	.end	__futex_syscall4
diff --git a/libc/arch-mips/bionic/memcmp16.S b/libc/arch-mips/bionic/memcmp16.S
new file mode 100644
index 0000000..a2b2544
--- /dev/null
+++ b/libc/arch-mips/bionic/memcmp16.S
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+	.text
+
+/*
+ * u4 __memcmp16(const u2* s0, const u2* s1, size_t count);
+ */
+	.type	__memcmp16, @function
+	.global	__memcmp16
+	.align	4
+	.ent __memcmp16
+__memcmp16:
+	li	$t0,0
+	li	$t1,0
+	beqz	$a2,done		/* 0 length string */ 
+	beq	$a0,$a1,done		/* strings are identical */
+
+	/* Unoptimised... */
+1:	lhu	$t0,0($a0)
+	lhu	$t1,0($a1)
+	addu	$a1,2
+	bne	$t0,$t1,done
+	addu	$a0,2
+	subu	$a2,1
+	bnez	$a2,1b
+
+done:
+	subu	$v0,$t0,$t1
+	j	$ra
+        .end __memcmp16
diff --git a/libc/arch-mips/bionic/memmove.c b/libc/arch-mips/bionic/memmove.c
new file mode 100644
index 0000000..1f4522b
--- /dev/null
+++ b/libc/arch-mips/bionic/memmove.c
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#include <string.h>
+#include <strings.h>
+
+void *memmove(void *dst, const void *src, size_t n)
+{
+  const char *p = src;
+  char *q = dst;
+  /* We can use the optimized memcpy if the destination is completely below the
+   * source (i.e. q + n <= p), or if it is completely over it (i.e. q >= p+n).
+   */
+  if (__builtin_expect((q + n < p) || (q >= p + n), 1)) {
+    return memcpy(dst, src, n);
+  } else {
+    bcopy(src, dst, n);
+    return dst;
+  }
+}
diff --git a/libc/arch-mips/bionic/pipe.S b/libc/arch-mips/bionic/pipe.S
new file mode 100644
index 0000000..8556569
--- /dev/null
+++ b/libc/arch-mips/bionic/pipe.S
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <asm/unistd.h>
+
+	.text
+
+/* int pipe(int[]) */
+
+	.type	pipe,@function
+	.global	pipe
+	.align	4
+	.ent	pipe
+pipe:
+	.set	noreorder
+
+	li	$v0,__NR_pipe
+	syscall			/* syscall returns results in v0,v1 */
+
+	sw	$v0,0($a0)
+	sw	$v1,4($a0)
+	j	$ra
+	 move	$v0,$zero
+	.end	pipe
diff --git a/libc/arch-mips/bionic/setjmp.S b/libc/arch-mips/bionic/setjmp.S
new file mode 100644
index 0000000..7c21195
--- /dev/null
+++ b/libc/arch-mips/bionic/setjmp.S
@@ -0,0 +1,211 @@
+/*      $OpenBSD: setjmp.S,v 1.5 2005/08/07 16:40:15 espie Exp $ */
+
+/*
+ * Copyright (c) 2001-2002 Opsycon AB  (www.opsycon.se / www.opsycon.com)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Opsycon AB nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <machine/asm.h>
+#include <machine/regnum.h>
+#include <machine/signal.h>
+
+/*
+ * setjmp, longjmp implementation for libc. this code depends
+ * on the layout of the struct sigcontext in machine/signal.h.
+ *
+ */
+
+FRAMESZ= MKFSIZ(2,6)
+A1OFF= FRAMESZ-4*REGSZ
+A0OFF= FRAMESZ-3*REGSZ
+GPOFF= FRAMESZ-2*REGSZ
+RAOFF= FRAMESZ-1*REGSZ
+
+#define FPREG64_S(FPR, OFF, BASE)       \
+        swc1    FPR, OFF(BASE)  ;       \
+        mfhc1   t0, FPR         ;       \
+        sw      t0, OFF+4(BASE) ;
+        
+#define FPREG64_L(FPR, OFF, BASE)       \
+        lw      t0, OFF+4(BASE) ;       \
+        lw      t1, OFF(BASE)   ;       \
+        mtc1    t1, FPR         ;       \
+        mthc1   t0, FPR         ;       \
+        
+NON_LEAF(setjmp, FRAMESZ, ra)
+	.mask	0x80000000, RAOFF
+	PTR_SUBU sp, FRAMESZ			# allocate stack frame
+	SETUP_GP64(GPOFF, setjmp)
+	SAVE_GP(GPOFF)
+	.set	reorder
+	REG_S	ra, RAOFF(sp)			# save state
+	REG_S	a0, A0OFF(sp)
+
+	move	a0, zero			# get current signal mask
+	jal	sigblock
+
+	REG_L	v1, A0OFF(sp)			# v1 = jmpbuf
+	REG_S	v0, SC_MASK(v1)			# save sc_mask = sigblock(0)
+
+	REG_L	a0, A0OFF(sp)			# restore jmpbuf
+	REG_L	ra, RAOFF(sp)
+	REG_S	ra, SC_PC(a0)			# sc_pc = return address
+#if defined(__mips64)
+	dli	v0, 0xACEDBADE			# sigcontext magic number
+#else
+	li	v0, 0xACEDBADE			# sigcontext magic number
+#endif
+	REG_S	v0, SC_REGS+ZERO*REGSZ(a0)
+	REG_S	s0, SC_REGS+S0*REGSZ(a0)
+	REG_S	s1, SC_REGS+S1*REGSZ(a0)
+	REG_S	s2, SC_REGS+S2*REGSZ(a0)
+	REG_S	s3, SC_REGS+S3*REGSZ(a0)
+	REG_S	s4, SC_REGS+S4*REGSZ(a0)
+	REG_S	s5, SC_REGS+S5*REGSZ(a0)
+	REG_S	s6, SC_REGS+S6*REGSZ(a0)
+	REG_S	s7, SC_REGS+S7*REGSZ(a0)
+	REG_S	s8, SC_REGS+S8*REGSZ(a0)
+	REG_L	v0, GPOFF(sp)
+	REG_S	v0, SC_REGS+GP*REGSZ(a0)
+	PTR_ADDU v0, sp, FRAMESZ
+	REG_S	v0, SC_REGS+SP*REGSZ(a0)
+
+#if !defined(SOFTFLOAT)
+	li	v0, 1				# be nice if we could tell
+	REG_S	v0, SC_FPUSED(a0)		# sc_fpused = 1
+	cfc1	v0, $31
+#if _MIPS_FPSET == 32
+        FPREG64_S($f20, SC_FPREGS+((F20-F0)*REGSZ_FP), a0)
+        FPREG64_S($f21, SC_FPREGS+((F21-F0)*REGSZ_FP), a0)
+        FPREG64_S($f22, SC_FPREGS+((F22-F0)*REGSZ_FP), a0)
+        FPREG64_S($f23, SC_FPREGS+((F23-F0)*REGSZ_FP), a0)
+        FPREG64_S($f24, SC_FPREGS+((F24-F0)*REGSZ_FP), a0)
+        FPREG64_S($f25, SC_FPREGS+((F25-F0)*REGSZ_FP), a0)
+        FPREG64_S($f26, SC_FPREGS+((F26-F0)*REGSZ_FP), a0)
+        FPREG64_S($f27, SC_FPREGS+((F27-F0)*REGSZ_FP), a0)
+        FPREG64_S($f28, SC_FPREGS+((F28-F0)*REGSZ_FP), a0)
+        FPREG64_S($f29, SC_FPREGS+((F29-F0)*REGSZ_FP), a0)
+        FPREG64_S($f30, SC_FPREGS+((F30-F0)*REGSZ_FP), a0)
+        FPREG64_S($f31, SC_FPREGS+((F31-F0)*REGSZ_FP), a0)
+#else
+        swc1    $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
+        swc1    $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
+        swc1    $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
+        swc1    $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
+        swc1    $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
+        swc1    $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
+        swc1    $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
+        swc1    $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
+        swc1    $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
+        swc1    $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
+        swc1    $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
+        swc1    $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
+#endif
+	REG_S	v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
+#endif /* !SOFTFLOAT */
+	move	v0, zero
+	RESTORE_GP64
+	PTR_ADDU sp, FRAMESZ
+	j	ra
+
+botch:
+	jal	longjmperror
+	jal	abort
+	RESTORE_GP64
+	PTR_ADDU sp, FRAMESZ
+END(setjmp)
+
+
+LEAF(longjmp, FRAMESZ)
+	PTR_SUBU sp, FRAMESZ
+	SETUP_GP64(GPOFF, longjmp)
+	SAVE_GP(GPOFF)
+	.set	reorder
+	sw	a1, A1OFF(sp)
+	sw	a0, A0OFF(sp)
+
+	lw	a0, SC_MASK(a0)
+	jal	sigsetmask
+
+	lw	a0, A0OFF(sp)
+	lw	a1, A1OFF(sp)
+
+	.set	noreorder	
+	REG_L	v0, SC_REGS+ZERO*REGSZ(a0)
+	bne	v0, 0xACEDBADE, botch		# jump if error
+	REG_L	ra, SC_PC(a0)
+	REG_L	s0, SC_REGS+S0*REGSZ(a0)
+	REG_L	s1, SC_REGS+S1*REGSZ(a0)
+	REG_L	s2, SC_REGS+S2*REGSZ(a0)
+	REG_L	s3, SC_REGS+S3*REGSZ(a0)
+	REG_L	s4, SC_REGS+S4*REGSZ(a0)
+	REG_L	s5, SC_REGS+S5*REGSZ(a0)
+	REG_L	s6, SC_REGS+S6*REGSZ(a0)
+	REG_L	s7, SC_REGS+S7*REGSZ(a0)
+	REG_L	s8, SC_REGS+S8*REGSZ(a0)
+	REG_L	gp, SC_REGS+GP*REGSZ(a0)
+	REG_L	sp, SC_REGS+SP*REGSZ(a0)
+	
+#if !defined(SOFTFLOAT)
+	REG_L	v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)	
+	ctc1	v0, $31
+#if _MIPS_FPSET == 32
+        FPREG64_L($f20, SC_FPREGS+((F20-F0)*REGSZ_FP), a0)
+        FPREG64_L($f21, SC_FPREGS+((F21-F0)*REGSZ_FP), a0)
+        FPREG64_L($f22, SC_FPREGS+((F22-F0)*REGSZ_FP), a0)
+        FPREG64_L($f23, SC_FPREGS+((F23-F0)*REGSZ_FP), a0)
+        FPREG64_L($f24, SC_FPREGS+((F24-F0)*REGSZ_FP), a0)
+        FPREG64_L($f25, SC_FPREGS+((F25-F0)*REGSZ_FP), a0)
+        FPREG64_L($f26, SC_FPREGS+((F26-F0)*REGSZ_FP), a0)
+        FPREG64_L($f27, SC_FPREGS+((F27-F0)*REGSZ_FP), a0)
+        FPREG64_L($f28, SC_FPREGS+((F28-F0)*REGSZ_FP), a0)
+        FPREG64_L($f29, SC_FPREGS+((F29-F0)*REGSZ_FP), a0)
+        FPREG64_L($f30, SC_FPREGS+((F30-F0)*REGSZ_FP), a0)
+        FPREG64_L($f31, SC_FPREGS+((F31-F0)*REGSZ_FP), a0)
+#else
+        lwc1    $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
+        lwc1    $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
+        lwc1    $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
+        lwc1    $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
+        lwc1    $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
+        lwc1    $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
+        lwc1    $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
+        lwc1    $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
+        lwc1    $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
+        lwc1    $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
+        lwc1    $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
+        lwc1    $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
+#endif
+#endif /* !SOFTFLOAT */
+	bne	a1, zero, 1f
+	 nop
+	li	a1, 1			# never return 0!
+1:
+	j	ra
+	 move	v0, a1
+
+END(longjmp)
diff --git a/libc/arch-mips/bionic/sigsetjmp.S b/libc/arch-mips/bionic/sigsetjmp.S
new file mode 100644
index 0000000..b05454c
--- /dev/null
+++ b/libc/arch-mips/bionic/sigsetjmp.S
@@ -0,0 +1,77 @@
+/* $OpenBSD: sigsetjmp.S,v 1.5 2005/08/07 16:40:15 espie Exp $ */
+/*-
+ * Copyright (c) 1991, 1993, 1995,
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Havard Eidnes.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+#include <machine/regnum.h>
+#include <machine/setjmp.h>
+
+/*
+ * trampolines for sigsetjmp and  siglongjmp save and restore mask.
+ *
+ */
+FRAMESZ= MKFSIZ(1,1)
+GPOFF= FRAMESZ-2*REGSZ
+
+LEAF(sigsetjmp, FRAMESZ)
+	PTR_SUBU sp, FRAMESZ
+	SETUP_GP64(GPOFF, sigsetjmp)
+	.set	reorder
+	REG_S	a1, (_JBLEN*REGSZ)(a0)		# save "savemask"
+	bne	a1, 0x0, 1f			# do saving of signal mask?
+	LA	t9, _setjmp
+	RESTORE_GP64
+	PTR_ADDU sp, FRAMESZ
+	jr t9
+
+1:	LA	t9, setjmp
+	RESTORE_GP64
+	PTR_ADDU sp, FRAMESZ
+	jr t9
+END(sigsetjmp)
+
+LEAF(siglongjmp, FRAMESZ)
+	PTR_SUBU sp, FRAMESZ
+	SETUP_GP64(GPOFF, siglongjmp)
+	.set	reorder
+	REG_L	t0, (_JBLEN*REGSZ)(a0)		# get "savemask"
+	bne	t0, 0x0, 1f			# restore signal mask?
+	LA	t9, _longjmp
+	RESTORE_GP64
+	PTR_ADDU sp, FRAMESZ
+	jr	t9
+1:
+	LA	t9, longjmp
+	RESTORE_GP64
+	PTR_ADDU sp, FRAMESZ
+	jr	t9
+END(siglongjmp)
diff --git a/libc/arch-mips/bionic/vfork.S b/libc/arch-mips/bionic/vfork.S
new file mode 100644
index 0000000..2e2e4ff
--- /dev/null
+++ b/libc/arch-mips/bionic/vfork.S
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <asm/unistd.h>
+
+	.text
+
+/* int vfork() implemented using clone() */
+
+	.type	vfork, @function
+	.global	vfork
+	.align	4
+	.ent	vfork
+vfork:
+	.set	noreorder
+	.cpload	$t9
+
+	li	$a0, 0x4112        /* CLONE_VM | CLONE_VFORK | SIGCHLD */
+	move	$a1, $sp
+	li	$v0, __NR_clone
+	syscall
+	bnez	$a3,1f
+	 nop
+
+	j	$ra
+	 nop
+1:
+	la	$t9,__set_errno
+	j	$t9
+	 move	$a0,$v0
+	.end	vfork