Update to kernel headers v4.9.3.
Test: Built arm, arm64, x86, x86_64 targets.
Test: Booted on angler, and ran bionic unit tests (32 bit and 64 bit).
Change-Id: I14a8dcbea11b41f83431eabed6590cd25af07b1d
diff --git a/libc/kernel/uapi/linux/pci_regs.h b/libc/kernel/uapi/linux/pci_regs.h
index 1f58a3b..ed3454e 100644
--- a/libc/kernel/uapi/linux/pci_regs.h
+++ b/libc/kernel/uapi/linux/pci_regs.h
@@ -647,77 +647,82 @@
#define PCI_EXP_DEVCAP2 36
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXP_DEVCAP2_ARI 0x00000020
+#define PCI_EXP_DEVCAP2_ATOMIC_ROUTE 0x00000040
+#define PCI_EXP_DEVCAP2_ATOMIC_COMP64 0x00000100
#define PCI_EXP_DEVCAP2_LTR 0x00000800
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXP_DEVCAP2_OBFF_MASK 0x000c0000
#define PCI_EXP_DEVCAP2_OBFF_MSG 0x00040000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXP_DEVCAP2_OBFF_WAKE 0x00080000
#define PCI_EXP_DEVCTL2 40
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXP_DEVCTL2_COMP_TIMEOUT 0x000f
#define PCI_EXP_DEVCTL2_ARI 0x0020
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define PCI_EXP_DEVCTL2_ATOMIC_REQ 0x0040
#define PCI_EXP_DEVCTL2_IDO_REQ_EN 0x0100
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXP_DEVCTL2_IDO_CMP_EN 0x0200
#define PCI_EXP_DEVCTL2_LTR_EN 0x0400
#define PCI_EXP_DEVCTL2_OBFF_MSGA_EN 0x2000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXP_DEVCTL2_OBFF_MSGB_EN 0x4000
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXP_DEVCTL2_OBFF_WAKE_EN 0x6000
#define PCI_EXP_DEVSTA2 42
#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 44
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXP_LNKCAP2 44
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXP_LNKCAP2_SLS_2_5GB 0x00000002
#define PCI_EXP_LNKCAP2_SLS_5_0GB 0x00000004
#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x00000008
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXP_LNKCAP2_CROSSLINK 0x00000100
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXP_LNKCTL2 48
#define PCI_EXP_LNKSTA2 50
#define PCI_EXP_SLTCAP2 52
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXP_SLTCTL2 56
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXP_SLTSTA2 58
#define PCI_EXT_CAP_ID(header) (header & 0x0000ffff)
#define PCI_EXT_CAP_VER(header) ((header >> 16) & 0xf)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXT_CAP_NEXT(header) ((header >> 20) & 0xffc)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXT_CAP_ID_ERR 0x01
#define PCI_EXT_CAP_ID_VC 0x02
#define PCI_EXT_CAP_ID_DSN 0x03
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXT_CAP_ID_PWR 0x04
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXT_CAP_ID_RCLD 0x05
#define PCI_EXT_CAP_ID_RCILC 0x06
#define PCI_EXT_CAP_ID_RCEC 0x07
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXT_CAP_ID_MFVC 0x08
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXT_CAP_ID_VC9 0x09
#define PCI_EXT_CAP_ID_RCRB 0x0A
#define PCI_EXT_CAP_ID_VNDR 0x0B
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXT_CAP_ID_CAC 0x0C
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXT_CAP_ID_ACS 0x0D
#define PCI_EXT_CAP_ID_ARI 0x0E
#define PCI_EXT_CAP_ID_ATS 0x0F
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXT_CAP_ID_SRIOV 0x10
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXT_CAP_ID_MRIOV 0x11
#define PCI_EXT_CAP_ID_MCAST 0x12
#define PCI_EXT_CAP_ID_PRI 0x13
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXT_CAP_ID_AMD_XXX 0x14
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXT_CAP_ID_REBAR 0x15
#define PCI_EXT_CAP_ID_DPA 0x16
#define PCI_EXT_CAP_ID_TPH 0x17
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXT_CAP_ID_LTR 0x18
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXT_CAP_ID_SECPCI 0x19
#define PCI_EXT_CAP_ID_PMUX 0x1A
#define PCI_EXT_CAP_ID_PASID 0x1B
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXT_CAP_ID_DPC 0x1D
-#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_DPC
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define PCI_EXT_CAP_ID_PTM 0x1F
+#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PTM
#define PCI_EXT_CAP_DSN_SIZEOF 12
#define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
@@ -1013,4 +1018,13 @@
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PCI_EXP_DPC_STATUS_INTERRUPT 0x08
#define PCI_EXP_DPC_SOURCE_ID 10
+#define PCI_PTM_CAP 0x04
+#define PCI_PTM_CAP_REQ 0x00000001
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define PCI_PTM_CAP_ROOT 0x00000004
+#define PCI_PTM_GRANULARITY_MASK 0x0000FF00
+#define PCI_PTM_CTRL 0x08
+#define PCI_PTM_CTRL_ENABLE 0x00000001
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define PCI_PTM_CTRL_ROOT 0x00000002
#endif