[MIPS] Clean Kernel headers are generated by running
libc/kernel/tools/update_all.py script. This patch ignores
any changes to libc/kernel directory not related to MIPS
architecture.
Change-Id: I2c9e461dccb7c33eb4420be2db1a562f45137c8d
Signed-off-by: Raghu Gandham <raghu@mips.com>
Signed-off-by: Chris Dearman <chris@mips.com>
diff --git a/libc/kernel/arch-mips/asm/dec/ecc.h b/libc/kernel/arch-mips/asm/dec/ecc.h
new file mode 100644
index 0000000..51342a5
--- /dev/null
+++ b/libc/kernel/arch-mips/asm/dec/ecc.h
@@ -0,0 +1,44 @@
+/****************************************************************************
+ ****************************************************************************
+ ***
+ *** This header was automatically generated from a Linux kernel header
+ *** of the same name, to make information necessary for userspace to
+ *** call into the kernel available to libc. It contains only constants,
+ *** structures, and macros generated from the original header, and thus,
+ *** contains no copyrightable information.
+ ***
+ *** To edit the content of this header, modify the corresponding
+ *** source file (e.g. under external/kernel-headers/original/) then
+ *** run bionic/libc/kernel/tools/update_all.py
+ ***
+ *** Any manual change here will be lost the next time this script will
+ *** be run. You've been warned!
+ ***
+ ****************************************************************************
+ ****************************************************************************/
+#ifndef __ASM_MIPS_DEC_ECC_H
+#define __ASM_MIPS_DEC_ECC_H
+#define KN0X_EAR_VALID (1<<31)
+#define KN0X_EAR_CPU (1<<30)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define KN0X_EAR_WRITE (1<<29)
+#define KN0X_EAR_ECCERR (1<<28)
+#define KN0X_EAR_RES_27 (1<<27)
+#define KN0X_EAR_ADDRESS (0x7ffffff<<0)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define KN0X_ESR_VLDHI (1<<31)
+#define KN0X_ESR_CHKHI (0x7f<<24)
+#define KN0X_ESR_SNGHI (1<<23)
+#define KN0X_ESR_SYNHI (0x7f<<16)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define KN0X_ESR_VLDLO (1<<15)
+#define KN0X_ESR_CHKLO (0x7f<<8)
+#define KN0X_ESR_SNGLO (1<<7)
+#define KN0X_ESR_SYNLO (0x7f<<0)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#ifndef __ASSEMBLY__
+#include <linux/interrupt.h>
+struct pt_regs;
+#endif
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#endif
diff --git a/libc/kernel/arch-mips/asm/dec/ioasic_addrs.h b/libc/kernel/arch-mips/asm/dec/ioasic_addrs.h
new file mode 100644
index 0000000..99774a1
--- /dev/null
+++ b/libc/kernel/arch-mips/asm/dec/ioasic_addrs.h
@@ -0,0 +1,124 @@
+/****************************************************************************
+ ****************************************************************************
+ ***
+ *** This header was automatically generated from a Linux kernel header
+ *** of the same name, to make information necessary for userspace to
+ *** call into the kernel available to libc. It contains only constants,
+ *** structures, and macros generated from the original header, and thus,
+ *** contains no copyrightable information.
+ ***
+ *** To edit the content of this header, modify the corresponding
+ *** source file (e.g. under external/kernel-headers/original/) then
+ *** run bionic/libc/kernel/tools/update_all.py
+ ***
+ *** Any manual change here will be lost the next time this script will
+ *** be run. You've been warned!
+ ***
+ ****************************************************************************
+ ****************************************************************************/
+#ifndef __ASM_MIPS_DEC_IOASIC_ADDRS_H
+#define __ASM_MIPS_DEC_IOASIC_ADDRS_H
+#define IOASIC_SLOT_SIZE 0x00040000
+#define IOASIC_SYS_ROM (0*IOASIC_SLOT_SIZE)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IOASIC_IOCTL (1*IOASIC_SLOT_SIZE)
+#define IOASIC_ESAR (2*IOASIC_SLOT_SIZE)
+#define IOASIC_LANCE (3*IOASIC_SLOT_SIZE)
+#define IOASIC_SCC0 (4*IOASIC_SLOT_SIZE)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IOASIC_VDAC_HI (5*IOASIC_SLOT_SIZE)
+#define IOASIC_SCC1 (6*IOASIC_SLOT_SIZE)
+#define IOASIC_VDAC_LO (7*IOASIC_SLOT_SIZE)
+#define IOASIC_TOY (8*IOASIC_SLOT_SIZE)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IOASIC_ISDN (9*IOASIC_SLOT_SIZE)
+#define IOASIC_ERRADDR (9*IOASIC_SLOT_SIZE)
+#define IOASIC_CHKSYN (10*IOASIC_SLOT_SIZE)
+#define IOASIC_ACC_BUS (10*IOASIC_SLOT_SIZE)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IOASIC_MCR (11*IOASIC_SLOT_SIZE)
+#define IOASIC_FLOPPY (11*IOASIC_SLOT_SIZE)
+#define IOASIC_SCSI (12*IOASIC_SLOT_SIZE)
+#define IOASIC_FDC_DMA (13*IOASIC_SLOT_SIZE)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IOASIC_SCSI_DMA (14*IOASIC_SLOT_SIZE)
+#define IOASIC_RES_15 (15*IOASIC_SLOT_SIZE)
+#define IO_REG_SCSI_DMA_P 0x00
+#define IO_REG_SCSI_DMA_BP 0x10
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IO_REG_LANCE_DMA_P 0x20
+#define IO_REG_SCC0A_T_DMA_P 0x30
+#define IO_REG_SCC0A_R_DMA_P 0x40
+#define IO_REG_SCC1A_T_DMA_P 0x50
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IO_REG_SCC1A_R_DMA_P 0x60
+#define IO_REG_AB_T_DMA_P 0x50
+#define IO_REG_AB_R_DMA_P 0x60
+#define IO_REG_FLOPPY_DMA_P 0x70
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IO_REG_ISDN_T_DMA_P 0x80
+#define IO_REG_ISDN_T_DMA_BP 0x90
+#define IO_REG_ISDN_R_DMA_P 0xa0
+#define IO_REG_ISDN_R_DMA_BP 0xb0
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IO_REG_DATA_0 0xc0
+#define IO_REG_DATA_1 0xd0
+#define IO_REG_DATA_2 0xe0
+#define IO_REG_DATA_3 0xf0
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IO_REG_SSR 0x100
+#define IO_REG_SIR 0x110
+#define IO_REG_SIMR 0x120
+#define IO_REG_SAR 0x130
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IO_REG_ISDN_T_DATA 0x140
+#define IO_REG_ISDN_R_DATA 0x150
+#define IO_REG_LANCE_SLOT 0x160
+#define IO_REG_SCSI_SLOT 0x170
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IO_REG_SCC0A_SLOT 0x180
+#define IO_REG_SCC1A_SLOT 0x190
+#define IO_REG_AB_SLOT 0x190
+#define IO_REG_FLOPPY_SLOT 0x1a0
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IO_REG_SCSI_SCR 0x1b0
+#define IO_REG_SCSI_SDR0 0x1c0
+#define IO_REG_SCSI_SDR1 0x1d0
+#define IO_REG_FCTR 0x1e0
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IO_REG_RES_31 0x1f0
+#define IO_SSR_SCC0A_TX_DMA_EN (1<<31)
+#define IO_SSR_SCC0A_RX_DMA_EN (1<<30)
+#define IO_SSR_RES_27 (1<<27)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IO_SSR_RES_26 (1<<26)
+#define IO_SSR_RES_25 (1<<25)
+#define IO_SSR_RES_24 (1<<24)
+#define IO_SSR_RES_23 (1<<23)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IO_SSR_SCSI_DMA_DIR (1<<18)
+#define IO_SSR_SCSI_DMA_EN (1<<17)
+#define IO_SSR_LANCE_DMA_EN (1<<16)
+#define IO_SSR_SCC1A_TX_DMA_EN (1<<29)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IO_SSR_SCC1A_RX_DMA_EN (1<<28)
+#define IO_SSR_RES_22 (1<<22)
+#define IO_SSR_RES_21 (1<<21)
+#define IO_SSR_RES_20 (1<<20)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IO_SSR_RES_19 (1<<19)
+#define IO_SSR_AB_TX_DMA_EN (1<<29)
+#define IO_SSR_AB_RX_DMA_EN (1<<28)
+#define IO_SSR_FLOPPY_DMA_DIR (1<<22)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IO_SSR_FLOPPY_DMA_EN (1<<21)
+#define IO_SSR_ISDN_TX_DMA_EN (1<<20)
+#define IO_SSR_ISDN_RX_DMA_EN (1<<19)
+#define KN0X_IO_SSR_DIAGDN (1<<15)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define KN0X_IO_SSR_SCC_RST (1<<11)
+#define KN0X_IO_SSR_RTC_RST (1<<10)
+#define KN0X_IO_SSR_ASC_RST (1<<9)
+#define KN0X_IO_SSR_LANCE_RST (1<<8)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#endif
diff --git a/libc/kernel/arch-mips/asm/dec/kn02xa.h b/libc/kernel/arch-mips/asm/dec/kn02xa.h
new file mode 100644
index 0000000..6078c8b
--- /dev/null
+++ b/libc/kernel/arch-mips/asm/dec/kn02xa.h
@@ -0,0 +1,61 @@
+/****************************************************************************
+ ****************************************************************************
+ ***
+ *** This header was automatically generated from a Linux kernel header
+ *** of the same name, to make information necessary for userspace to
+ *** call into the kernel available to libc. It contains only constants,
+ *** structures, and macros generated from the original header, and thus,
+ *** contains no copyrightable information.
+ ***
+ *** To edit the content of this header, modify the corresponding
+ *** source file (e.g. under external/kernel-headers/original/) then
+ *** run bionic/libc/kernel/tools/update_all.py
+ ***
+ *** Any manual change here will be lost the next time this script will
+ *** be run. You've been warned!
+ ***
+ ****************************************************************************
+ ****************************************************************************/
+#ifndef __ASM_MIPS_DEC_KN02XA_H
+#define __ASM_MIPS_DEC_KN02XA_H
+#include <asm/dec/ioasic_addrs.h>
+#define KN02XA_SLOT_BASE 0x1c000000
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define KN02XA_MER 0x0c400000
+#define KN02XA_MSR 0x0c800000
+#define KN02XA_MEM_CONF 0x0e000000
+#define KN02XA_EAR 0x0e000004
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define KN02XA_BOOT0 0x0e000008
+#define KN02XA_MEM_INTR 0x0e00000c
+#define KN02XA_MER_RES_28 (0xf<<28)
+#define KN02XA_MER_RES_17 (0x3ff<<17)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define KN02XA_MER_PAGERR (1<<16)
+#define KN02XA_MER_TRANSERR (1<<15)
+#define KN02XA_MER_PARDIS (1<<14)
+#define KN02XA_MER_SIZE (1<<13)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define KN02XA_MER_RES_12 (1<<12)
+#define KN02XA_MER_BYTERR (0xf<<8)
+#define KN02XA_MER_BYTERR_3 (0x8<<8)
+#define KN02XA_MER_BYTERR_2 (0x4<<8)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define KN02XA_MER_BYTERR_1 (0x2<<8)
+#define KN02XA_MER_BYTERR_0 (0x1<<8)
+#define KN02XA_MER_RES_0 (0xff<<0)
+#define KN02XA_MSR_RES_27 (0x1f<<27)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define KN02XA_MSR_RES_14 (0x7<<14)
+#define KN02XA_MSR_SIZE (1<<13)
+#define KN02XA_MSR_RES_0 (0x1fff<<0)
+#define KN02XA_EAR_RES_29 (0x7<<29)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define KN02XA_EAR_ADDRESS (0x7ffffff<<2)
+#define KN02XA_EAR_RES_0 (0x3<<0)
+#ifndef __ASSEMBLY__
+#include <linux/interrupt.h>
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct pt_regs;
+#endif
+#endif
diff --git a/libc/kernel/arch-mips/asm/dec/system.h b/libc/kernel/arch-mips/asm/dec/system.h
new file mode 100644
index 0000000..94cf431
--- /dev/null
+++ b/libc/kernel/arch-mips/asm/dec/system.h
@@ -0,0 +1,21 @@
+/****************************************************************************
+ ****************************************************************************
+ ***
+ *** This header was automatically generated from a Linux kernel header
+ *** of the same name, to make information necessary for userspace to
+ *** call into the kernel available to libc. It contains only constants,
+ *** structures, and macros generated from the original header, and thus,
+ *** contains no copyrightable information.
+ ***
+ *** To edit the content of this header, modify the corresponding
+ *** source file (e.g. under external/kernel-headers/original/) then
+ *** run bionic/libc/kernel/tools/update_all.py
+ ***
+ *** Any manual change here will be lost the next time this script will
+ *** be run. You've been warned!
+ ***
+ ****************************************************************************
+ ****************************************************************************/
+#ifndef __ASM_DEC_SYSTEM_H
+#define __ASM_DEC_SYSTEM_H
+#endif