diff --git a/libc/kernel/arch-mips/asm/sgi/hpc3.h b/libc/kernel/arch-mips/asm/sgi/hpc3.h
new file mode 100644
index 0000000..d4f4280
--- /dev/null
+++ b/libc/kernel/arch-mips/asm/sgi/hpc3.h
@@ -0,0 +1,290 @@
+/****************************************************************************
+ ****************************************************************************
+ ***
+ ***   This header was automatically generated from a Linux kernel header
+ ***   of the same name, to make information necessary for userspace to
+ ***   call into the kernel available to libc.  It contains only constants,
+ ***   structures, and macros generated from the original header, and thus,
+ ***   contains no copyrightable information.
+ ***
+ ***   To edit the content of this header, modify the corresponding
+ ***   source file (e.g. under external/kernel-headers/original/) then
+ ***   run bionic/libc/kernel/tools/update_all.py
+ ***
+ ***   Any manual change here will be lost the next time this script will
+ ***   be run. You've been warned!
+ ***
+ ****************************************************************************
+ ****************************************************************************/
+#ifndef _SGI_HPC3_H
+#define _SGI_HPC3_H
+#include <linux/types.h>
+#include <asm/page.h>
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct hpc_dma_desc {
+ u32 pbuf;
+ u32 cntinfo;
+#define HPCDMA_EOX 0x80000000  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPCDMA_EOR 0x80000000  
+#define HPCDMA_EOXP 0x40000000  
+#define HPCDMA_EORP 0x40000000  
+#define HPCDMA_XIE 0x20000000  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPCDMA_XIU 0x01000000  
+#define HPCDMA_EIPC 0x00ff0000  
+#define HPCDMA_ETXD 0x00008000  
+#define HPCDMA_OWN 0x00004000  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPCDMA_BCNT 0x00003fff  
+ u32 pnext;
+};
+struct hpc3_pbus_dmacregs {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u32 pbdma_bptr;
+ volatile u32 pbdma_dptr;
+ u32 _unused0[0x1000/4 - 2];
+ volatile u32 pbdma_ctrl;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_PDMACTRL_INT 0x00000001  
+#define HPC3_PDMACTRL_ISACT 0x00000002  
+#define HPC3_PDMACTRL_SEL 0x00000002  
+#define HPC3_PDMACTRL_RCV 0x00000004  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_PDMACTRL_FLSH 0x00000008  
+#define HPC3_PDMACTRL_ACT 0x00000010  
+#define HPC3_PDMACTRL_LD 0x00000020  
+#define HPC3_PDMACTRL_RT 0x00000040  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_PDMACTRL_HW 0x0000ff00  
+#define HPC3_PDMACTRL_FB 0x003f0000  
+#define HPC3_PDMACTRL_FE 0x3f000000  
+ u32 _unused1[0x1000/4 - 1];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
+struct hpc3_scsiregs {
+ volatile u32 cbptr;
+ volatile u32 ndptr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ u32 _unused0[0x1000/4 - 2];
+ volatile u32 bcd;
+#define HPC3_SBCD_BCNTMSK 0x00003fff  
+#define HPC3_SBCD_XIE 0x00004000  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_SBCD_EOX 0x00008000  
+ volatile u32 ctrl;
+#define HPC3_SCTRL_IRQ 0x01  
+#define HPC3_SCTRL_ENDIAN 0x02  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_SCTRL_DIR 0x04  
+#define HPC3_SCTRL_FLUSH 0x08  
+#define HPC3_SCTRL_ACTIVE 0x10  
+#define HPC3_SCTRL_AMASK 0x20  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_SCTRL_CRESET 0x40  
+#define HPC3_SCTRL_PERR 0x80  
+ volatile u32 gfptr;
+ volatile u32 dfptr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u32 dconfig;
+#define HPC3_SDCFG_HCLK 0x00001  
+#define HPC3_SDCFG_D1 0x00006  
+#define HPC3_SDCFG_D2 0x00038  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_SDCFG_D3 0x001c0  
+#define HPC3_SDCFG_HWAT 0x00e00  
+#define HPC3_SDCFG_HW 0x01000  
+#define HPC3_SDCFG_SWAP 0x02000  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_SDCFG_EPAR 0x04000  
+#define HPC3_SDCFG_POLL 0x08000  
+#define HPC3_SDCFG_ERLY 0x30000  
+ volatile u32 pconfig;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_SPCFG_P3 0x0003  
+#define HPC3_SPCFG_P2W 0x001c  
+#define HPC3_SPCFG_P2R 0x01e0  
+#define HPC3_SPCFG_P1 0x0e00  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_SPCFG_HW 0x1000  
+#define HPC3_SPCFG_SWAP 0x2000  
+#define HPC3_SPCFG_EPAR 0x4000  
+#define HPC3_SPCFG_FUJI 0x8000  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ u32 _unused1[0x1000/4 - 6];
+};
+struct hpc3_ethregs {
+ volatile u32 rx_cbptr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u32 rx_ndptr;
+ u32 _unused0[0x1000/4 - 2];
+ volatile u32 rx_bcd;
+#define HPC3_ERXBCD_BCNTMSK 0x00003fff  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_ERXBCD_XIE 0x20000000  
+#define HPC3_ERXBCD_EOX 0x80000000  
+ volatile u32 rx_ctrl;
+#define HPC3_ERXCTRL_STAT50 0x0000003f  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_ERXCTRL_STAT6 0x00000040  
+#define HPC3_ERXCTRL_STAT7 0x00000080  
+#define HPC3_ERXCTRL_ENDIAN 0x00000100  
+#define HPC3_ERXCTRL_ACTIVE 0x00000200  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_ERXCTRL_AMASK 0x00000400  
+#define HPC3_ERXCTRL_RBO 0x00000800  
+ volatile u32 rx_gfptr;
+ volatile u32 rx_dfptr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ u32 _unused1;
+ volatile u32 reset;
+#define HPC3_ERST_CRESET 0x1  
+#define HPC3_ERST_CLRIRQ 0x2  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_ERST_LBACK 0x4  
+ volatile u32 dconfig;
+#define HPC3_EDCFG_D1 0x0000f  
+#define HPC3_EDCFG_D2 0x000f0  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_EDCFG_D3 0x00f00  
+#define HPC3_EDCFG_WCTRL 0x01000  
+#define HPC3_EDCFG_FRXDC 0x02000  
+#define HPC3_EDCFG_FEOP 0x04000  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_EDCFG_FIRQ 0x08000  
+#define HPC3_EDCFG_PTO 0x30000  
+ volatile u32 pconfig;
+#define HPC3_EPCFG_P1 0x000f  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_EPCFG_P2 0x00f0  
+#define HPC3_EPCFG_P3 0x0f00  
+#define HPC3_EPCFG_TST 0x1000  
+ u32 _unused2[0x1000/4 - 8];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u32 tx_cbptr;
+ volatile u32 tx_ndptr;
+ u32 _unused3[0x1000/4 - 2];
+ volatile u32 tx_bcd;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_ETXBCD_BCNTMSK 0x00003fff  
+#define HPC3_ETXBCD_ESAMP 0x10000000  
+#define HPC3_ETXBCD_XIE 0x20000000  
+#define HPC3_ETXBCD_EOP 0x40000000  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_ETXBCD_EOX 0x80000000  
+ volatile u32 tx_ctrl;
+#define HPC3_ETXCTRL_STAT30 0x0000000f  
+#define HPC3_ETXCTRL_STAT4 0x00000010  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_ETXCTRL_STAT75 0x000000e0  
+#define HPC3_ETXCTRL_ENDIAN 0x00000100  
+#define HPC3_ETXCTRL_ACTIVE 0x00000200  
+#define HPC3_ETXCTRL_AMASK 0x00000400  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u32 tx_gfptr;
+ volatile u32 tx_dfptr;
+ u32 _unused4[0x1000/4 - 4];
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct hpc3_regs {
+ struct hpc3_pbus_dmacregs pbdma[8];
+ struct hpc3_scsiregs scsi_chan0, scsi_chan1;
+ struct hpc3_ethregs ethregs;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ u32 _unused0[0x18000/4];
+ volatile u32 istat0;
+#define HPC3_ISTAT_PBIMASK 0x0ff  
+#define HPC3_ISTAT_SC0MASK 0x100  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_ISTAT_SC1MASK 0x200  
+ volatile u32 gio_misc;
+#define HPC3_GIOMISC_ERTIME 0x1  
+#define HPC3_GIOMISC_DENDIAN 0x2  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ u32 eeprom;
+#define HPC3_EEPROM_EPROT 0x01  
+#define HPC3_EEPROM_CSEL 0x02  
+#define HPC3_EEPROM_ECLK 0x04  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_EEPROM_DATO 0x08  
+#define HPC3_EEPROM_DATI 0x10  
+ volatile u32 istat1;
+ volatile u32 bestat;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_BESTAT_BLMASK 0x000ff  
+#define HPC3_BESTAT_CTYPE 0x00100  
+#define HPC3_BESTAT_PIDSHIFT 9
+#define HPC3_BESTAT_PIDMASK 0x3f700  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ u32 _unused1[0x14000/4 - 5];
+ volatile u32 scsi0_ext[256];
+ u32 _unused2[0x7c00/4];
+ volatile u32 scsi1_ext[256];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ u32 _unused3[0x7c00/4];
+ volatile u32 eth_ext[320];
+ u32 _unused4[0x3b00/4];
+ volatile u32 pbus_extregs[16][256];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u32 pbus_dmacfg[8][128];
+#define HPC3_DMACFG_D3R_MASK 0x00000001
+#define HPC3_DMACFG_D3R_SHIFT 0
+#define HPC3_DMACFG_D4R_MASK 0x0000001e
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_DMACFG_D4R_SHIFT 1
+#define HPC3_DMACFG_D5R_MASK 0x000001e0
+#define HPC3_DMACFG_D5R_SHIFT 5
+#define HPC3_DMACFG_D3W_MASK 0x00000200
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_DMACFG_D3W_SHIFT 9
+#define HPC3_DMACFG_D4W_MASK 0x00003c00
+#define HPC3_DMACFG_D4W_SHIFT 10
+#define HPC3_DMACFG_D5W_MASK 0x0003c000
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_DMACFG_D5W_SHIFT 14
+#define HPC3_DMACFG_DS16 0x00040000
+#define HPC3_DMACFG_EVENHI 0x00080000
+#define HPC3_DMACFG_RTIME 0x00200000
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_DMACFG_BURST_MASK 0x07c00000
+#define HPC3_DMACFG_BURST_SHIFT 22
+#define HPC3_DMACFG_DRQLIVE 0x08000000
+ volatile u32 pbus_piocfg[16][64];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_PIOCFG_P2R_MASK 0x00001
+#define HPC3_PIOCFG_P2R_SHIFT 0
+#define HPC3_PIOCFG_P3R_MASK 0x0001e
+#define HPC3_PIOCFG_P3R_SHIFT 1
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_PIOCFG_P4R_MASK 0x001e0
+#define HPC3_PIOCFG_P4R_SHIFT 5
+#define HPC3_PIOCFG_P2W_MASK 0x00200
+#define HPC3_PIOCFG_P2W_SHIFT 9
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_PIOCFG_P3W_MASK 0x03c00
+#define HPC3_PIOCFG_P3W_SHIFT 10
+#define HPC3_PIOCFG_P4W_MASK 0x3c000
+#define HPC3_PIOCFG_P4W_SHIFT 14
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_PIOCFG_DS16 0x40000
+#define HPC3_PIOCFG_EVENHI 0x80000
+ volatile u32 pbus_promwe;
+#define HPC3_PROM_WENAB 0x1  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ u32 _unused5[0x0800/4 - 1];
+ volatile u32 pbus_promswap;
+#define HPC3_PROM_SWAP 0x1  
+ u32 _unused6[0x0800/4 - 1];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u32 pbus_gout;
+#define HPC3_PROM_STAT 0x1  
+ u32 _unused7[0x1000/4 - 1];
+ volatile u32 rtcregs[14];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ u32 _unused8[50];
+ volatile u32 bbram[8192-50-14];
+};
+#define HPC3_CHIP0_BASE 0x1fb80000  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HPC3_CHIP1_BASE 0x1fb00000  
+#endif
diff --git a/libc/kernel/arch-mips/asm/sgi/ioc.h b/libc/kernel/arch-mips/asm/sgi/ioc.h
new file mode 100644
index 0000000..db75b20
--- /dev/null
+++ b/libc/kernel/arch-mips/asm/sgi/ioc.h
@@ -0,0 +1,221 @@
+/****************************************************************************
+ ****************************************************************************
+ ***
+ ***   This header was automatically generated from a Linux kernel header
+ ***   of the same name, to make information necessary for userspace to
+ ***   call into the kernel available to libc.  It contains only constants,
+ ***   structures, and macros generated from the original header, and thus,
+ ***   contains no copyrightable information.
+ ***
+ ***   To edit the content of this header, modify the corresponding
+ ***   source file (e.g. under external/kernel-headers/original/) then
+ ***   run bionic/libc/kernel/tools/update_all.py
+ ***
+ ***   Any manual change here will be lost the next time this script will
+ ***   be run. You've been warned!
+ ***
+ ****************************************************************************
+ ****************************************************************************/
+#ifndef _SGI_IOC_H
+#define _SGI_IOC_H
+#include <linux/types.h>
+#include <asm/sgi/pi1.h>
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct sgioc_uart_regs {
+ u8 _ctrl1[3];
+ volatile u8 ctrl1;
+ u8 _data1[3];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u8 data1;
+ u8 _ctrl2[3];
+ volatile u8 ctrl2;
+ u8 _data2[3];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u8 data2;
+};
+struct sgioc_keyb_regs {
+ u8 _data[3];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u8 data;
+ u8 _command[3];
+ volatile u8 command;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct sgint_regs {
+ u8 _istat0[3];
+ volatile u8 istat0;
+#define SGINT_ISTAT0_FFULL 0x01
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SGINT_ISTAT0_SCSI0 0x02
+#define SGINT_ISTAT0_SCSI1 0x04
+#define SGINT_ISTAT0_ENET 0x08
+#define SGINT_ISTAT0_GFXDMA 0x10
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SGINT_ISTAT0_PPORT 0x20
+#define SGINT_ISTAT0_HPC2 0x40
+#define SGINT_ISTAT0_LIO2 0x80
+ u8 _imask0[3];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u8 imask0;
+ u8 _istat1[3];
+ volatile u8 istat1;
+#define SGINT_ISTAT1_ISDNI 0x01
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SGINT_ISTAT1_PWR 0x02
+#define SGINT_ISTAT1_ISDNH 0x04
+#define SGINT_ISTAT1_LIO3 0x08
+#define SGINT_ISTAT1_HPC3 0x10
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SGINT_ISTAT1_AFAIL 0x20
+#define SGINT_ISTAT1_VIDEO 0x40
+#define SGINT_ISTAT1_GIO2 0x80
+ u8 _imask1[3];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u8 imask1;
+ u8 _vmeistat[3];
+ volatile u8 vmeistat;
+ u8 _cmeimask0[3];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u8 cmeimask0;
+ u8 _cmeimask1[3];
+ volatile u8 cmeimask1;
+ u8 _cmepol[3];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u8 cmepol;
+ u8 _tclear[3];
+ volatile u8 tclear;
+ u8 _errstat[3];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u8 errstat;
+ u32 _unused0[2];
+ u8 _tcnt0[3];
+ volatile u8 tcnt0;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ u8 _tcnt1[3];
+ volatile u8 tcnt1;
+ u8 _tcnt2[3];
+ volatile u8 tcnt2;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ u8 _tcword[3];
+ volatile u8 tcword;
+#define SGINT_TCWORD_BCD 0x01  
+#define SGINT_TCWORD_MMASK 0x0e  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SGINT_TCWORD_MITC 0x00  
+#define SGINT_TCWORD_MOS 0x02  
+#define SGINT_TCWORD_MRGEN 0x04  
+#define SGINT_TCWORD_MSWGEN 0x06  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SGINT_TCWORD_MSWST 0x08  
+#define SGINT_TCWORD_MHWST 0x0a  
+#define SGINT_TCWORD_CMASK 0x30  
+#define SGINT_TCWORD_CLAT 0x00  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SGINT_TCWORD_CLSB 0x10  
+#define SGINT_TCWORD_CMSB 0x20  
+#define SGINT_TCWORD_CALL 0x30  
+#define SGINT_TCWORD_CNT0 0x00  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SGINT_TCWORD_CNT1 0x40  
+#define SGINT_TCWORD_CNT2 0x80  
+#define SGINT_TCWORD_CRBCK 0xc0  
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SGINT_TIMER_CLOCK 1000000
+#define SGINT_TCSAMP_COUNTER ((SGINT_TIMER_CLOCK / HZ) + 255)
+struct sgioc_regs {
+ struct pi1_regs pport;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ u32 _unused0[2];
+ struct sgioc_uart_regs uart;
+ struct sgioc_keyb_regs kbdmouse;
+ u8 _gcsel[3];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u8 gcsel;
+ u8 _genctrl[3];
+ volatile u8 genctrl;
+ u8 _panel[3];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u8 panel;
+#define SGIOC_PANEL_POWERON 0x01
+#define SGIOC_PANEL_POWERINTR 0x02
+#define SGIOC_PANEL_VOLDNINTR 0x10
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SGIOC_PANEL_VOLDNHOLD 0x20
+#define SGIOC_PANEL_VOLUPINTR 0x40
+#define SGIOC_PANEL_VOLUPHOLD 0x80
+ u32 _unused1;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ u8 _sysid[3];
+ volatile u8 sysid;
+#define SGIOC_SYSID_FULLHOUSE 0x01
+#define SGIOC_SYSID_BOARDREV(x) (((x) & 0x1e) >> 1)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SGIOC_SYSID_CHIPREV(x) (((x) & 0xe0) >> 5)
+ u32 _unused2;
+ u8 _read[3];
+ volatile u8 read;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ u32 _unused3;
+ u8 _dmasel[3];
+ volatile u8 dmasel;
+#define SGIOC_DMASEL_SCLK10MHZ 0x00  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SGIOC_DMASEL_ISDNB 0x01  
+#define SGIOC_DMASEL_ISDNA 0x02  
+#define SGIOC_DMASEL_PPORT 0x04  
+#define SGIOC_DMASEL_SCLK667MHZ 0x10  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SGIOC_DMASEL_SCLKEXT 0x20  
+ u32 _unused4;
+ u8 _reset[3];
+ volatile u8 reset;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SGIOC_RESET_PPORT 0x01  
+#define SGIOC_RESET_KBDMOUSE 0x02  
+#define SGIOC_RESET_EISA 0x04  
+#define SGIOC_RESET_ISDN 0x08  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SGIOC_RESET_LC0OFF 0x10  
+#define SGIOC_RESET_LC1OFF 0x20  
+ u32 _unused5;
+ u8 _write[3];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u8 write;
+#define SGIOC_WRITE_NTHRESH 0x01  
+#define SGIOC_WRITE_TPSPEED 0x02  
+#define SGIOC_WRITE_EPSEL 0x04  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SGIOC_WRITE_EASEL 0x08  
+#define SGIOC_WRITE_U1AMODE 0x10  
+#define SGIOC_WRITE_U0AMODE 0x20  
+#define SGIOC_WRITE_MLO 0x40  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SGIOC_WRITE_MHI 0x80  
+ u32 _unused6;
+ struct sgint_regs int3;
+ u32 _unused7[16];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u32 extio;
+#define EXTIO_S0_IRQ_3 0x8000  
+#define EXTIO_S0_IRQ_2 0x4000  
+#define EXTIO_S0_IRQ_1 0x2000  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define EXTIO_S0_RETRACE 0x1000
+#define EXTIO_SG_IRQ_3 0x0800  
+#define EXTIO_SG_IRQ_2 0x0400  
+#define EXTIO_SG_IRQ_1 0x0200  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define EXTIO_SG_RETRACE 0x0100
+#define EXTIO_GIO_33MHZ 0x0080
+#define EXTIO_EISA_BUSERR 0x0040
+#define EXTIO_MC_BUSERR 0x0020
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define EXTIO_HPC3_BUSERR 0x0010
+#define EXTIO_S0_STAT_1 0x0008
+#define EXTIO_S0_STAT_0 0x0004
+#define EXTIO_SG_STAT_1 0x0002
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define EXTIO_SG_STAT_0 0x0001
+};
+#endif
diff --git a/libc/kernel/arch-mips/asm/sgi/pi1.h b/libc/kernel/arch-mips/asm/sgi/pi1.h
new file mode 100644
index 0000000..1aa0438
--- /dev/null
+++ b/libc/kernel/arch-mips/asm/sgi/pi1.h
@@ -0,0 +1,99 @@
+/****************************************************************************
+ ****************************************************************************
+ ***
+ ***   This header was automatically generated from a Linux kernel header
+ ***   of the same name, to make information necessary for userspace to
+ ***   call into the kernel available to libc.  It contains only constants,
+ ***   structures, and macros generated from the original header, and thus,
+ ***   contains no copyrightable information.
+ ***
+ ***   To edit the content of this header, modify the corresponding
+ ***   source file (e.g. under external/kernel-headers/original/) then
+ ***   run bionic/libc/kernel/tools/update_all.py
+ ***
+ ***   Any manual change here will be lost the next time this script will
+ ***   be run. You've been warned!
+ ***
+ ****************************************************************************
+ ****************************************************************************/
+#ifndef _SGI_PI1_H
+#define _SGI_PI1_H
+struct pi1_regs {
+ u8 _data[3];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u8 data;
+ u8 _ctrl[3];
+ volatile u8 ctrl;
+#define PI1_CTRL_STROBE_N 0x01
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define PI1_CTRL_AFD_N 0x02
+#define PI1_CTRL_INIT_N 0x04
+#define PI1_CTRL_SLIN_N 0x08
+#define PI1_CTRL_IRQ_ENA 0x10
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define PI1_CTRL_DIR 0x20
+#define PI1_CTRL_SEL 0x40
+ u8 _status[3];
+ volatile u8 status;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define PI1_STAT_DEVID 0x03  
+#define PI1_STAT_NOINK 0x04  
+#define PI1_STAT_ERROR 0x08
+#define PI1_STAT_ONLINE 0x10
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define PI1_STAT_PE 0x20
+#define PI1_STAT_ACK 0x40
+#define PI1_STAT_BUSY 0x80
+ u8 _dmactrl[3];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u8 dmactrl;
+#define PI1_DMACTRL_FIFO_EMPTY 0x01  
+#define PI1_DMACTRL_ABORT 0x02  
+#define PI1_DMACTRL_STDMODE 0x00  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define PI1_DMACTRL_SGIMODE 0x04  
+#define PI1_DMACTRL_RICOHMODE 0x08  
+#define PI1_DMACTRL_HPMODE 0x0c  
+#define PI1_DMACTRL_BLKMODE 0x10  
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define PI1_DMACTRL_FIFO_CLEAR 0x20  
+#define PI1_DMACTRL_READ 0x40  
+#define PI1_DMACTRL_RUN 0x80  
+ u8 _intstat[3];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u8 intstat;
+#define PI1_INTSTAT_ACK 0x04
+#define PI1_INTSTAT_FEMPTY 0x08
+#define PI1_INTSTAT_NOINK 0x10
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define PI1_INTSTAT_ONLINE 0x20
+#define PI1_INTSTAT_ERR 0x40
+#define PI1_INTSTAT_PE 0x80
+ u8 _intmask[3];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u8 intmask;
+#define PI1_INTMASK_ACK 0x04
+#define PI1_INTMASK_FIFO_EMPTY 0x08
+#define PI1_INTMASK_NOINK 0x10
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define PI1_INTMASK_ONLINE 0x20
+#define PI1_INTMASK_ERR 0x40
+#define PI1_INTMASK_PE 0x80
+ u8 _timer1[3];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ volatile u8 timer1;
+#define PI1_TIME1 0x27
+ u8 _timer2[3];
+ volatile u8 timer2;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define PI1_TIME2 0x13
+ u8 _timer3[3];
+ volatile u8 timer3;
+#define PI1_TIME3 0x10
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ u8 _timer4[3];
+ volatile u8 timer4;
+#define PI1_TIME4 0x00
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#endif