Atomic/SMP update, part 3.
Update ARM atomic ops to use LDREX/STREX. Stripped out #if 0 chunk.
Insert explicit memory barriers in pthread and semaphore code.
For bug 2721865.
Change-Id: I0f153b797753a655702d8be41679273d1d5d6ae7
diff --git a/libc/Android.mk b/libc/Android.mk
index 0271f10..831352b 100644
--- a/libc/Android.mk
+++ b/libc/Android.mk
@@ -455,6 +455,14 @@
endif # x86
endif # !arm
+# Define ANDROID_SMP appropriately.
+ifeq ($(TARGET_CPU_SMP),true)
+ libc_common_cflags += -DANDROID_SMP=1
+else
+ libc_common_cflags += -DANDROID_SMP=0
+endif
+
+
# Define some common includes
# ========================================================
libc_common_c_includes := \