athurh | 2fbb576 | 2013-08-10 22:21:23 +0200 | [diff] [blame] | 1 | /*************************************************************************** |
| 2 | Copyright (c) 2009-2012 Code Aurora Forum. All rights reserved. |
| 3 | |
| 4 | Redistribution and use in source and binary forms, with or without |
| 5 | modification, are permitted provided that the following conditions are met: |
| 6 | * Redistributions of source code must retain the above copyright |
| 7 | notice, this list of conditions and the following disclaimer. |
| 8 | * Redistributions in binary form must reproduce the above copyright |
| 9 | notice, this list of conditions and the following disclaimer in the |
| 10 | documentation and/or other materials provided with the distribution. |
| 11 | * Neither the name of Code Aurora nor the names of its contributors may |
| 12 | be used to endorse or promote products derived from this software |
| 13 | without specific prior written permission. |
| 14 | |
| 15 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 16 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 17 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 18 | ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 19 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 20 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 21 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 22 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 23 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 24 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 25 | POSSIBILITY OF SUCH DAMAGE. |
| 26 | ***************************************************************************/ |
| 27 | |
| 28 | /*************************************************************************** |
| 29 | * Neon memmove: Attempts to do a memmove with Neon registers if possible, |
| 30 | * Inputs: |
| 31 | * dest: The destination buffer |
| 32 | * src: The source buffer |
| 33 | * n: The size of the buffer to transfer |
| 34 | * Outputs: |
| 35 | * |
| 36 | ***************************************************************************/ |
| 37 | |
| 38 | #include <machine/cpu-features.h> |
| 39 | |
| 40 | #ifndef PLDOFFS |
| 41 | #define PLDOFFS (10) |
| 42 | #endif |
| 43 | #ifndef PLDTHRESH |
| 44 | #define PLDTHRESH (PLDOFFS) |
| 45 | #endif |
| 46 | #if (PLDOFFS < 5) |
| 47 | #error Routine does not support offsets less than 5 |
| 48 | #endif |
| 49 | #if (PLDTHRESH < PLDOFFS) |
| 50 | #error PLD threshold must be greater than or equal to the PLD offset |
| 51 | #endif |
| 52 | #ifndef PLDSIZE |
| 53 | #define PLDSIZE (64) |
| 54 | #endif |
| 55 | #define NOP_OPCODE (0xe320f000) |
| 56 | |
| 57 | .code 32 |
| 58 | .align 5 |
| 59 | .global memmove |
| 60 | .type memmove, %function |
| 61 | |
| 62 | .global bcopy |
| 63 | .type bcopy, %function |
| 64 | |
| 65 | bcopy: |
| 66 | mov r12, r0 |
| 67 | mov r0, r1 |
| 68 | mov r1, r12 |
| 69 | .balignl 64, NOP_OPCODE, 4*2 |
| 70 | memmove: |
| 71 | .Lneon_memmove_cmf: |
| 72 | subs r12, r0, r1 |
| 73 | bxeq lr |
| 74 | cmphi r2, r12 |
| 75 | bls memcpy /* Use memcpy for non-overlapping areas */ |
| 76 | |
| 77 | push {r0} |
| 78 | |
| 79 | .Lneon_back_to_front_copy: |
| 80 | add r0, r0, r2 |
| 81 | add r1, r1, r2 |
| 82 | cmp r2, #4 |
| 83 | bgt .Lneon_b2f_gt4 |
| 84 | cmp r2, #0 |
| 85 | .Lneon_b2f_smallcopy_loop: |
| 86 | beq .Lneon_memmove_done |
| 87 | ldrb r12, [r1, #-1]! |
| 88 | subs r2, r2, #1 |
| 89 | strb r12, [r0, #-1]! |
| 90 | b .Lneon_b2f_smallcopy_loop |
| 91 | .Lneon_b2f_gt4: |
| 92 | sub r3, r0, r1 |
| 93 | cmp r2, r3 |
| 94 | movle r12, r2 |
| 95 | movgt r12, r3 |
| 96 | cmp r12, #64 |
| 97 | bge .Lneon_b2f_copy_64 |
| 98 | cmp r12, #32 |
| 99 | bge .Lneon_b2f_copy_32 |
| 100 | cmp r12, #8 |
| 101 | bge .Lneon_b2f_copy_8 |
| 102 | cmp r12, #4 |
| 103 | bge .Lneon_b2f_copy_4 |
| 104 | b .Lneon_b2f_copy_1 |
| 105 | .Lneon_b2f_copy_64: |
| 106 | sub r1, r1, #64 /* Predecrement */ |
| 107 | sub r0, r0, #64 |
| 108 | movs r12, r2, lsr #6 |
| 109 | cmp r12, #PLDTHRESH |
| 110 | ble .Lneon_b2f_copy_64_loop_nopld |
| 111 | sub r12, #PLDOFFS |
| 112 | pld [r1, #-(PLDOFFS-5)*PLDSIZE] |
| 113 | pld [r1, #-(PLDOFFS-4)*PLDSIZE] |
| 114 | pld [r1, #-(PLDOFFS-3)*PLDSIZE] |
| 115 | pld [r1, #-(PLDOFFS-2)*PLDSIZE] |
| 116 | pld [r1, #-(PLDOFFS-1)*PLDSIZE] |
| 117 | .balignl 64, NOP_OPCODE, 4*2 |
| 118 | .Lneon_b2f_copy_64_loop_outer: |
| 119 | pld [r1, #-(PLDOFFS)*PLDSIZE] |
| 120 | vld1.32 {q0, q1}, [r1]! |
| 121 | vld1.32 {q2, q3}, [r1] |
| 122 | subs r12, r12, #1 |
| 123 | vst1.32 {q0, q1}, [r0]! |
| 124 | sub r1, r1, #96 /* Post-fixup and predecrement */ |
| 125 | vst1.32 {q2, q3}, [r0] |
| 126 | sub r0, r0, #96 |
| 127 | bne .Lneon_b2f_copy_64_loop_outer |
| 128 | mov r12, #PLDOFFS |
| 129 | .balignl 64, NOP_OPCODE, 4*2 |
| 130 | .Lneon_b2f_copy_64_loop_nopld: |
| 131 | vld1.32 {q8, q9}, [r1]! |
| 132 | vld1.32 {q10, q11}, [r1] |
| 133 | subs r12, r12, #1 |
| 134 | vst1.32 {q8, q9}, [r0]! |
| 135 | sub r1, r1, #96 /* Post-fixup and predecrement */ |
| 136 | vst1.32 {q10, q11}, [r0] |
| 137 | sub r0, r0, #96 |
| 138 | bne .Lneon_b2f_copy_64_loop_nopld |
| 139 | ands r2, r2, #0x3f |
| 140 | beq .Lneon_memmove_done |
| 141 | add r1, r1, #64 /* Post-fixup */ |
| 142 | add r0, r0, #64 |
| 143 | cmp r2, #32 |
| 144 | blt .Lneon_b2f_copy_finish |
| 145 | .Lneon_b2f_copy_32: |
| 146 | mov r12, r2, lsr #5 |
| 147 | .Lneon_b2f_copy_32_loop: |
| 148 | sub r1, r1, #32 /* Predecrement */ |
| 149 | sub r0, r0, #32 |
| 150 | vld1.32 {q0,q1}, [r1] |
| 151 | subs r12, r12, #1 |
| 152 | vst1.32 {q0,q1}, [r0] |
| 153 | bne .Lneon_b2f_copy_32_loop |
| 154 | ands r2, r2, #0x1f |
| 155 | beq .Lneon_memmove_done |
| 156 | .Lneon_b2f_copy_finish: |
| 157 | .Lneon_b2f_copy_8: |
| 158 | movs r12, r2, lsr #0x3 |
| 159 | beq .Lneon_b2f_copy_4 |
| 160 | .balignl 64, NOP_OPCODE, 4*2 |
| 161 | .Lneon_b2f_copy_8_loop: |
| 162 | sub r1, r1, #8 /* Predecrement */ |
| 163 | sub r0, r0, #8 |
| 164 | vld1.32 {d0}, [r1] |
| 165 | subs r12, r12, #1 |
| 166 | vst1.32 {d0}, [r0] |
| 167 | bne .Lneon_b2f_copy_8_loop |
| 168 | ands r2, r2, #0x7 |
| 169 | beq .Lneon_memmove_done |
| 170 | .Lneon_b2f_copy_4: |
| 171 | movs r12, r2, lsr #0x2 |
| 172 | beq .Lneon_b2f_copy_1 |
| 173 | .Lneon_b2f_copy_4_loop: |
| 174 | ldr r3, [r1, #-4]! |
| 175 | subs r12, r12, #1 |
| 176 | str r3, [r0, #-4]! |
| 177 | bne .Lneon_b2f_copy_4_loop |
| 178 | ands r2, r2, #0x3 |
| 179 | .Lneon_b2f_copy_1: |
| 180 | cmp r2, #0 |
| 181 | beq .Lneon_memmove_done |
| 182 | .balignl 64, NOP_OPCODE, 4*2 |
| 183 | .Lneon_b2f_copy_1_loop: |
| 184 | ldrb r12, [r1, #-1]! |
| 185 | subs r2, r2, #1 |
| 186 | strb r12, [r0, #-1]! |
| 187 | bne .Lneon_b2f_copy_1_loop |
| 188 | |
| 189 | .Lneon_memmove_done: |
| 190 | pop {r0} |
| 191 | bx lr |
| 192 | |
| 193 | .end |