)]}'
{
  "log": [
    {
      "commit": "d1973ca51325393f304e82a4d79874f33e54ac16",
      "tree": "75a657d895a41aa4855a06ef1e0e986c963e0eef",
      "parents": [
        "5b4884fac90753c68d401de73036c2de919958eb"
      ],
      "author": {
        "name": "Colin Cross",
        "email": "ccross@android.com",
        "time": "Tue Jan 21 19:50:58 2014 -0800"
      },
      "committer": {
        "name": "Colin Cross",
        "email": "ccross@android.com",
        "time": "Thu Jan 23 18:35:39 2014 -0800"
      },
      "message": "bionic: rename aarch64 target to arm64\n\nRename aarch64 build targets to arm64.  The gcc toolchain is still\naarch64.\n\nChange-Id: Ia92d8a50824e5329cf00fd6f4f92eae112b7f3a3\n"
    },
    {
      "commit": "845c778fa6ebb3ff3feaac0c268d93f4017c0cda",
      "tree": "1c38223ae764a3cb90650a916af849f64b8a00be",
      "parents": [
        "1afb375d30cadf5dfcb5dfe352527e2a1147c79f"
      ],
      "author": {
        "name": "Serban Constantinescu",
        "email": "serban.constantinescu@arm.com",
        "time": "Thu Dec 19 11:57:10 2013 +0000"
      },
      "committer": {
        "name": "Elliott Hughes",
        "email": "enh@google.com",
        "time": "Thu Dec 19 11:39:01 2013 -0800"
      },
      "message": "ARM: Change dmb domain for bionic_atomic_barrier()\n\nThis patch changes the domain that the memory barrier operates on. Assumes\nthat the scope of bionic_atomic_barrier() does not include device memory,\nmemory shared with the GPU or any other memory external to the processor\ncluster.\n\nChange-Id: I291e741c98a64c86f3a3cf99811bbf1e714ac9aa\nSigned-off-by: Serban Constantinescu \u003cserban.constantinescu@arm.com\u003e\n"
    },
    {
      "commit": "1924a5c92e1791bdb6a5e9c09541a5a9a343983b",
      "tree": "0e069b3e78f42df4eda54abd28bdc2df5e6a8ced",
      "parents": [
        "3937d41561206430373c4b3e0690d6f81b536412"
      ],
      "author": {
        "name": "Serban Constantinescu",
        "email": "serban.constantinescu@arm.com",
        "time": "Tue Oct 08 19:29:55 2013 +0100"
      },
      "committer": {
        "name": "Elliott Hughes",
        "email": "enh@google.com",
        "time": "Mon Dec 16 13:09:33 2013 -0800"
      },
      "message": "AArch64: Add support for AArch64 atomic operations\n\nThis patch adds support for AArch64 atomic operations. Some\nof the stubs use the lightweight store/load exclusive.\n\nChange-Id: Iaf704d048b2dc15bf08cf8e4f0c3ea9f2052fe13\nSigned-off-by: Serban Constantinescu \u003cserban.constantinescu@arm.com\u003e\n"
    },
    {
      "commit": "2b333b97a241eec63d531874e28f2a894bc06aa0",
      "tree": "9952f121aace89107d0105995133fd4490e6222a",
      "parents": [
        "003be7104b5cb075632b0ff98d8ab4d3d182ed8c"
      ],
      "author": {
        "name": "Elliott Hughes",
        "email": "enh@google.com",
        "time": "Fri Dec 13 16:54:16 2013 -0800"
      },
      "committer": {
        "name": "Elliott Hughes",
        "email": "enh@google.com",
        "time": "Mon Dec 16 10:18:11 2013 -0800"
      },
      "message": "Clean up the pthread-only atomic stuff a little.\n\nIt looks like we can probably just use the generic GCC stuff instead;\nthe generated code looks pretty similar. We should come back to that.\n\nThese routines are only used by the pthread implementation, and\n__bionic_atomic_inc isn\u0027t used, so we can remove it.\n\nChange-Id: I8b5b8cb30a1b159f0e85c3675aee06ddef39b429\n"
    },
    {
      "commit": "52d6233296ec84eb5b58fcbf7bc9da4b96a943aa",
      "tree": "b0186ce62c2aedc309501f0bfc641a291d91d3e6",
      "parents": [
        "a7916509a3446afd0e863b03e4204cee73e81555"
      ],
      "author": {
        "name": "Elliott Hughes",
        "email": "enh@google.com",
        "time": "Fri Jul 27 17:40:29 2012 -0700"
      },
      "committer": {
        "name": "Elliott Hughes",
        "email": "enh@google.com",
        "time": "Fri Jul 27 17:43:38 2012 -0700"
      },
      "message": "Report errors to the log, not just stderr.\n\nIn particular this affects assert(3) and __cxa_pure_virtual, both of\nwhich have managed to confuse people this week by apparently aborting\nwithout reason. (Because stderr goes nowhere, normally.)\n\nBug: 6852995\nBug: 6840813\nChange-Id: I7f5d17d5ddda439e217b7932096702dc013b9142\n"
    },
    {
      "commit": "f7fb9e1ef1e159be2fded066d126d8e1f111b772",
      "tree": "5b5605e5203bd658fdeef3f1bbef1676c93413c6",
      "parents": [
        "b109e437fcbc1cbe09fce8ce2abb6f951d5a0274"
      ],
      "author": {
        "name": "Raghu Gandham",
        "email": "raghu@mips.com",
        "time": "Fri Jun 29 15:52:55 2012 -0700"
      },
      "committer": {
        "name": "Raghu Gandham",
        "email": "raghu@mips.com",
        "time": "Tue Jul 24 10:30:22 2012 -0700"
      },
      "message": "[MIPS] Add atomic routines\n\nChange-Id: I2cb20ce44dd230d222b7fc1ede2e1e3dce6e692b\n"
    },
    {
      "commit": "e31bfae2baa96742f998155ee26e56c826a8ce3a",
      "tree": "b12cfb44ad035c26278f42fa9b19095e90b79e95",
      "parents": [
        "8180b08fb2f27052f9df2ae4787bb5bf409f13e0"
      ],
      "author": {
        "name": "David \u0027Digit\u0027 Turner",
        "email": "digit@android.com",
        "time": "Tue Nov 15 15:47:02 2011 +0100"
      },
      "committer": {
        "name": "David \u0027Digit\u0027 Turner",
        "email": "digit@google.com",
        "time": "Wed Nov 16 16:28:10 2011 +0100"
      },
      "message": "bionic: Do not use \u003csys/atomics.h\u003e for platform code.\n\nWe\u0027re going to modify the __atomic_xxx implementation to provide\nfull memory barriers, to avoid problems for NDK machine code that\nlink to these functions.\n\nFirst step is to remove their usage from our platform code.\nWe now use inlined versions of the same functions for a slight\nperformance boost.\n\n+ remove obsolete atomics_x86.c (was never compiled)\n\nNOTE: This improvement was benchmarked on various devices.\n      Comparing a pthread mutex lock + atomic increment + unlock\n      we get:\n\n  - ARMv7 emulator, running on a 2.4 GHz Xeon:\n       before: 396 ns    after: 288 ns\n\n  - x86 emulator in KVM mode on same machine:\n       before: 27 ns     after: 27 ns\n\n  - Google Nexus S, in ARMv7 mode (single-core):\n       before: 82 ns     after: 76 ns\n\n  - Motorola Xoom, in ARMv7 mode (multi-core):\n       before: 121 ns    after: 120 ns\n\nThe code has also been rebuilt in ARMv5TE mode for correctness.\n\nChange-Id: Ic1dc72b173d59b2e7af901dd70d6a72fb2f64b17\n"
    },
    {
      "commit": "6c8a2f2a5bc8d612ee953f528f2b5eb35983656a",
      "tree": "7dd45d3e3162220578e93a6cb7244b4209b1c7c5",
      "parents": [
        "038fbae518e904c7aba64779714a22dbeeb90887"
      ],
      "author": {
        "name": "David \u0027Digit\u0027 Turner",
        "email": "digit@google.com",
        "time": "Thu Jun 10 23:34:24 2010 -0700"
      },
      "committer": {
        "name": "David \u0027Digit\u0027 Turner",
        "email": "digit@google.com",
        "time": "Fri Jun 11 13:49:09 2010 -0700"
      },
      "message": "libc: remove cutils dependencies\n\nWe simply copy the stuff we need from cutils headers.\n\nA future patch will change cutils to include the private \u003cbionic_atomic_inline.h\u003e\n\nChange-Id: Ib6fd9a03bc9e337ce867bd606dc94c2b4438480a\n"
    }
  ]
}