tree 84806c5f1b5839e66edcfc811927b137fda7a247
parent e10a854c4602072c34c03380b99da0a3ee15682c
author Cliff Brake <cbrake@bec-systems.com> 1232662023 -0500
committer Pierre Ossman <drzeus@drzeus.cx> 1233604627 +0100

pxamci: enable DMA for write ops after CMD/RESP

With the PXA270 MMC hardware, there seems to be an issue of
data corruption on writes where a 4KB data block is offset
by one byte.

If we delay enabling the DMA for writes until after the CMD/RESP
has finished, the problem seems to be fixed.

related to PXA270 Erratum #91

Tested-by: Vernon Sauder <VernonInHand@gmail.com>
Signed-off-by: Cliff Brake <cbrake@bec-systems.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>