blob: e06d3cb0ee1143ff278771beccd259157ace2c05 [file] [log] [blame]
Russell Kinga09e64f2008-08-05 16:14:15 +01001/*
2 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MXC_IRQS_H__
12#define __ASM_ARCH_MXC_IRQS_H__
13
Sascha Hauer9d631b82008-12-18 11:08:55 +010014/*
15 * So far all i.MX SoCs have 64 internal interrupts
16 */
17#define MXC_INTERNAL_IRQS 64
18
19#define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS
20
21#if defined CONFIG_ARCH_MX1
22#define MXC_GPIO_IRQS (32 * 4)
23#elif defined CONFIG_ARCH_MX2
24#define MXC_GPIO_IRQS (32 * 6)
25#elif defined CONFIG_ARCH_MX3
26#define MXC_GPIO_IRQS (32 * 3)
27#endif
28
29/*
30 * The next 16 interrupts are for board specific purposes. Since
31 * the kernel can only run on one machine at a time, we can re-use
32 * these. If you need more, increase MXC_BOARD_IRQS, but keep it
33 * within sensible limits.
34 */
35#define MXC_BOARD_IRQ_START (MXC_INTERNAL_IRQS + MXC_GPIO_IRQS)
36#define MXC_BOARD_IRQS 16
37
38#define NR_IRQS (MXC_BOARD_IRQ_START + MXC_BOARD_IRQS)
39
Darius Augulis479c9012008-09-09 11:29:41 +020040extern void imx_irq_set_priority(unsigned char irq, unsigned char prio);
Russell Kinga09e64f2008-08-05 16:14:15 +010041
Paulius Zaleckasd7927e12008-11-14 11:01:39 +010042/* all normal IRQs can be FIQs */
43#define FIQ_START 0
44/* switch betwean IRQ and FIQ */
45extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type);
46
Russell Kinga09e64f2008-08-05 16:14:15 +010047#endif /* __ASM_ARCH_MXC_IRQS_H__ */