| commit | 8ea857188fff9da791004ebaf6d2cfca6426ad09 | [log] [tgz] |
|---|---|---|
| author | Brian Zhu <brian.zhu@amlogic.com> | Thu Oct 10 01:24:07 2019 +0800 |
| committer | Chris KIM <codewalker@hardkernel.com> | Mon Nov 25 16:10:50 2019 +0900 |
| tree | 077bbf4ebe658b1206837201d00a9a57f1b10d20 | |
| parent | d64207d7b7cc6a6de4d751c1d5fb508991d3eaae [diff] |
vpp: set the sr position reg correctly [1/1] PD#SWPL-14963 Problem: The position bits of super scaler is incorrect. Solution: Set the position bits correctly Verify: Verified on U212 Change-Id: I133662859456f65e130b8795f574da845039c717 Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>