Nicholas Flintham | 1e3d311 | 2013-04-10 10:48:38 +0100 | [diff] [blame^] | 1 | #ifndef __ASM_ARM_IRQFLAGS_H |
| 2 | #define __ASM_ARM_IRQFLAGS_H |
| 3 | |
| 4 | #ifdef __KERNEL__ |
| 5 | |
| 6 | #include <asm/ptrace.h> |
| 7 | |
| 8 | #if __LINUX_ARM_ARCH__ >= 6 |
| 9 | |
| 10 | static inline unsigned long arch_local_irq_save(void) |
| 11 | { |
| 12 | unsigned long flags; |
| 13 | |
| 14 | asm volatile( |
| 15 | " mrs %0, cpsr @ arch_local_irq_save\n" |
| 16 | " cpsid i" |
| 17 | : "=r" (flags) : : "memory", "cc"); |
| 18 | return flags; |
| 19 | } |
| 20 | |
| 21 | static inline void arch_local_irq_enable(void) |
| 22 | { |
| 23 | asm volatile( |
| 24 | " cpsie i @ arch_local_irq_enable" |
| 25 | : |
| 26 | : |
| 27 | : "memory", "cc"); |
| 28 | } |
| 29 | |
| 30 | static inline void arch_local_irq_disable(void) |
| 31 | { |
| 32 | asm volatile( |
| 33 | " cpsid i @ arch_local_irq_disable" |
| 34 | : |
| 35 | : |
| 36 | : "memory", "cc"); |
| 37 | } |
| 38 | |
| 39 | #define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc") |
| 40 | #define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc") |
| 41 | #else |
| 42 | |
| 43 | static inline unsigned long arch_local_irq_save(void) |
| 44 | { |
| 45 | unsigned long flags, temp; |
| 46 | |
| 47 | asm volatile( |
| 48 | " mrs %0, cpsr @ arch_local_irq_save\n" |
| 49 | " orr %1, %0, #128\n" |
| 50 | " msr cpsr_c, %1" |
| 51 | : "=r" (flags), "=r" (temp) |
| 52 | : |
| 53 | : "memory", "cc"); |
| 54 | return flags; |
| 55 | } |
| 56 | |
| 57 | static inline void arch_local_irq_enable(void) |
| 58 | { |
| 59 | unsigned long temp; |
| 60 | asm volatile( |
| 61 | " mrs %0, cpsr @ arch_local_irq_enable\n" |
| 62 | " bic %0, %0, #128\n" |
| 63 | " msr cpsr_c, %0" |
| 64 | : "=r" (temp) |
| 65 | : |
| 66 | : "memory", "cc"); |
| 67 | } |
| 68 | |
| 69 | static inline void arch_local_irq_disable(void) |
| 70 | { |
| 71 | unsigned long temp; |
| 72 | asm volatile( |
| 73 | " mrs %0, cpsr @ arch_local_irq_disable\n" |
| 74 | " orr %0, %0, #128\n" |
| 75 | " msr cpsr_c, %0" |
| 76 | : "=r" (temp) |
| 77 | : |
| 78 | : "memory", "cc"); |
| 79 | } |
| 80 | |
| 81 | #define local_fiq_enable() \ |
| 82 | ({ \ |
| 83 | unsigned long temp; \ |
| 84 | __asm__ __volatile__( \ |
| 85 | "mrs %0, cpsr @ stf\n" \ |
| 86 | " bic %0, %0, #64\n" \ |
| 87 | " msr cpsr_c, %0" \ |
| 88 | : "=r" (temp) \ |
| 89 | : \ |
| 90 | : "memory", "cc"); \ |
| 91 | }) |
| 92 | |
| 93 | #define local_fiq_disable() \ |
| 94 | ({ \ |
| 95 | unsigned long temp; \ |
| 96 | __asm__ __volatile__( \ |
| 97 | "mrs %0, cpsr @ clf\n" \ |
| 98 | " orr %0, %0, #64\n" \ |
| 99 | " msr cpsr_c, %0" \ |
| 100 | : "=r" (temp) \ |
| 101 | : \ |
| 102 | : "memory", "cc"); \ |
| 103 | }) |
| 104 | |
| 105 | #endif |
| 106 | |
| 107 | static inline unsigned long arch_local_save_flags(void) |
| 108 | { |
| 109 | unsigned long flags; |
| 110 | asm volatile( |
| 111 | " mrs %0, cpsr @ local_save_flags" |
| 112 | : "=r" (flags) : : "memory", "cc"); |
| 113 | return flags; |
| 114 | } |
| 115 | |
| 116 | static inline void arch_local_irq_restore(unsigned long flags) |
| 117 | { |
| 118 | asm volatile( |
| 119 | " msr cpsr_c, %0 @ local_irq_restore" |
| 120 | : |
| 121 | : "r" (flags) |
| 122 | : "memory", "cc"); |
| 123 | } |
| 124 | |
| 125 | static inline int arch_irqs_disabled_flags(unsigned long flags) |
| 126 | { |
| 127 | return flags & PSR_I_BIT; |
| 128 | } |
| 129 | |
| 130 | #endif |
| 131 | #endif |