blob: 7a1ceb777ba14c577ee146e7200c091d45e3aa31 [file] [log] [blame]
Nicholas Flintham1e3d3112013-04-10 10:48:38 +01001/*
2 * frontend.h
3 *
4 * Copyright (C) 2000 Marcus Metzler <marcus@convergence.de>
5 * Ralph Metzler <ralph@convergence.de>
6 * Holger Waechtler <holger@convergence.de>
7 * Andre Draszik <ad@convergence.de>
8 * for convergence integrated media GmbH
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU Lesser General Public License
12 * as published by the Free Software Foundation; either version 2.1
13 * of the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU Lesser General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 *
24 */
25
26#ifndef _DVBFRONTEND_H_
27#define _DVBFRONTEND_H_
28
29#include <linux/types.h>
30
31typedef enum fe_type {
32 FE_QPSK,
33 FE_QAM,
34 FE_OFDM,
35 FE_ATSC
36} fe_type_t;
37
38
39typedef enum fe_caps {
40 FE_IS_STUPID = 0,
41 FE_CAN_INVERSION_AUTO = 0x1,
42 FE_CAN_FEC_1_2 = 0x2,
43 FE_CAN_FEC_2_3 = 0x4,
44 FE_CAN_FEC_3_4 = 0x8,
45 FE_CAN_FEC_4_5 = 0x10,
46 FE_CAN_FEC_5_6 = 0x20,
47 FE_CAN_FEC_6_7 = 0x40,
48 FE_CAN_FEC_7_8 = 0x80,
49 FE_CAN_FEC_8_9 = 0x100,
50 FE_CAN_FEC_AUTO = 0x200,
51 FE_CAN_QPSK = 0x400,
52 FE_CAN_QAM_16 = 0x800,
53 FE_CAN_QAM_32 = 0x1000,
54 FE_CAN_QAM_64 = 0x2000,
55 FE_CAN_QAM_128 = 0x4000,
56 FE_CAN_QAM_256 = 0x8000,
57 FE_CAN_QAM_AUTO = 0x10000,
58 FE_CAN_TRANSMISSION_MODE_AUTO = 0x20000,
59 FE_CAN_BANDWIDTH_AUTO = 0x40000,
60 FE_CAN_GUARD_INTERVAL_AUTO = 0x80000,
61 FE_CAN_HIERARCHY_AUTO = 0x100000,
62 FE_CAN_8VSB = 0x200000,
63 FE_CAN_16VSB = 0x400000,
64 FE_HAS_EXTENDED_CAPS = 0x800000,
65 FE_CAN_TURBO_FEC = 0x8000000,
66 FE_CAN_2G_MODULATION = 0x10000000,
67 FE_NEEDS_BENDING = 0x20000000,
68 FE_CAN_RECOVER = 0x40000000,
69 FE_CAN_MUTE_TS = 0x80000000
70} fe_caps_t;
71
72
73struct dvb_frontend_info {
74 char name[128];
75 fe_type_t type;
76 __u32 frequency_min;
77 __u32 frequency_max;
78 __u32 frequency_stepsize;
79 __u32 frequency_tolerance;
80 __u32 symbol_rate_min;
81 __u32 symbol_rate_max;
82 __u32 symbol_rate_tolerance;
83 __u32 notifier_delay;
84 fe_caps_t caps;
85};
86
87
88struct dvb_diseqc_master_cmd {
89 __u8 msg [6];
90 __u8 msg_len;
91};
92
93
94struct dvb_diseqc_slave_reply {
95 __u8 msg [4];
96 __u8 msg_len;
97 int timeout;
98};
99
100
101typedef enum fe_sec_voltage {
102 SEC_VOLTAGE_13,
103 SEC_VOLTAGE_18,
104 SEC_VOLTAGE_OFF
105} fe_sec_voltage_t;
106
107
108typedef enum fe_sec_tone_mode {
109 SEC_TONE_ON,
110 SEC_TONE_OFF
111} fe_sec_tone_mode_t;
112
113
114typedef enum fe_sec_mini_cmd {
115 SEC_MINI_A,
116 SEC_MINI_B
117} fe_sec_mini_cmd_t;
118
119
120typedef enum fe_status {
121 FE_HAS_SIGNAL = 0x01,
122 FE_HAS_CARRIER = 0x02,
123 FE_HAS_VITERBI = 0x04,
124 FE_HAS_SYNC = 0x08,
125 FE_HAS_LOCK = 0x10,
126 FE_TIMEDOUT = 0x20,
127 FE_REINIT = 0x40
128} fe_status_t;
129
130
131typedef enum fe_spectral_inversion {
132 INVERSION_OFF,
133 INVERSION_ON,
134 INVERSION_AUTO
135} fe_spectral_inversion_t;
136
137
138typedef enum fe_code_rate {
139 FEC_NONE = 0,
140 FEC_1_2,
141 FEC_2_3,
142 FEC_3_4,
143 FEC_4_5,
144 FEC_5_6,
145 FEC_6_7,
146 FEC_7_8,
147 FEC_8_9,
148 FEC_AUTO,
149 FEC_3_5,
150 FEC_9_10,
151} fe_code_rate_t;
152
153
154typedef enum fe_modulation {
155 QPSK,
156 QAM_16,
157 QAM_32,
158 QAM_64,
159 QAM_128,
160 QAM_256,
161 QAM_AUTO,
162 VSB_8,
163 VSB_16,
164 PSK_8,
165 APSK_16,
166 APSK_32,
167 DQPSK,
168} fe_modulation_t;
169
170typedef enum fe_transmit_mode {
171 TRANSMISSION_MODE_2K,
172 TRANSMISSION_MODE_8K,
173 TRANSMISSION_MODE_AUTO,
174 TRANSMISSION_MODE_4K,
175 TRANSMISSION_MODE_1K,
176 TRANSMISSION_MODE_16K,
177 TRANSMISSION_MODE_32K,
178} fe_transmit_mode_t;
179
180#if defined(__DVB_CORE__) || !defined (__KERNEL__)
181typedef enum fe_bandwidth {
182 BANDWIDTH_8_MHZ,
183 BANDWIDTH_7_MHZ,
184 BANDWIDTH_6_MHZ,
185 BANDWIDTH_AUTO,
186 BANDWIDTH_5_MHZ,
187 BANDWIDTH_10_MHZ,
188 BANDWIDTH_1_712_MHZ,
189} fe_bandwidth_t;
190#endif
191
192typedef enum fe_guard_interval {
193 GUARD_INTERVAL_1_32,
194 GUARD_INTERVAL_1_16,
195 GUARD_INTERVAL_1_8,
196 GUARD_INTERVAL_1_4,
197 GUARD_INTERVAL_AUTO,
198 GUARD_INTERVAL_1_128,
199 GUARD_INTERVAL_19_128,
200 GUARD_INTERVAL_19_256,
201} fe_guard_interval_t;
202
203
204typedef enum fe_hierarchy {
205 HIERARCHY_NONE,
206 HIERARCHY_1,
207 HIERARCHY_2,
208 HIERARCHY_4,
209 HIERARCHY_AUTO
210} fe_hierarchy_t;
211
212
213#if defined(__DVB_CORE__) || !defined (__KERNEL__)
214struct dvb_qpsk_parameters {
215 __u32 symbol_rate;
216 fe_code_rate_t fec_inner;
217};
218
219struct dvb_qam_parameters {
220 __u32 symbol_rate;
221 fe_code_rate_t fec_inner;
222 fe_modulation_t modulation;
223};
224
225struct dvb_vsb_parameters {
226 fe_modulation_t modulation;
227};
228
229struct dvb_ofdm_parameters {
230 fe_bandwidth_t bandwidth;
231 fe_code_rate_t code_rate_HP;
232 fe_code_rate_t code_rate_LP;
233 fe_modulation_t constellation;
234 fe_transmit_mode_t transmission_mode;
235 fe_guard_interval_t guard_interval;
236 fe_hierarchy_t hierarchy_information;
237};
238
239
240struct dvb_frontend_parameters {
241 __u32 frequency;
242
243 fe_spectral_inversion_t inversion;
244 union {
245 struct dvb_qpsk_parameters qpsk;
246 struct dvb_qam_parameters qam;
247 struct dvb_ofdm_parameters ofdm;
248 struct dvb_vsb_parameters vsb;
249 } u;
250};
251
252struct dvb_frontend_event {
253 fe_status_t status;
254 struct dvb_frontend_parameters parameters;
255};
256#endif
257
258#define DTV_UNDEFINED 0
259#define DTV_TUNE 1
260#define DTV_CLEAR 2
261#define DTV_FREQUENCY 3
262#define DTV_MODULATION 4
263#define DTV_BANDWIDTH_HZ 5
264#define DTV_INVERSION 6
265#define DTV_DISEQC_MASTER 7
266#define DTV_SYMBOL_RATE 8
267#define DTV_INNER_FEC 9
268#define DTV_VOLTAGE 10
269#define DTV_TONE 11
270#define DTV_PILOT 12
271#define DTV_ROLLOFF 13
272#define DTV_DISEQC_SLAVE_REPLY 14
273
274#define DTV_FE_CAPABILITY_COUNT 15
275#define DTV_FE_CAPABILITY 16
276#define DTV_DELIVERY_SYSTEM 17
277
278#define DTV_ISDBT_PARTIAL_RECEPTION 18
279#define DTV_ISDBT_SOUND_BROADCASTING 19
280
281#define DTV_ISDBT_SB_SUBCHANNEL_ID 20
282#define DTV_ISDBT_SB_SEGMENT_IDX 21
283#define DTV_ISDBT_SB_SEGMENT_COUNT 22
284
285#define DTV_ISDBT_LAYERA_FEC 23
286#define DTV_ISDBT_LAYERA_MODULATION 24
287#define DTV_ISDBT_LAYERA_SEGMENT_COUNT 25
288#define DTV_ISDBT_LAYERA_TIME_INTERLEAVING 26
289
290#define DTV_ISDBT_LAYERB_FEC 27
291#define DTV_ISDBT_LAYERB_MODULATION 28
292#define DTV_ISDBT_LAYERB_SEGMENT_COUNT 29
293#define DTV_ISDBT_LAYERB_TIME_INTERLEAVING 30
294
295#define DTV_ISDBT_LAYERC_FEC 31
296#define DTV_ISDBT_LAYERC_MODULATION 32
297#define DTV_ISDBT_LAYERC_SEGMENT_COUNT 33
298#define DTV_ISDBT_LAYERC_TIME_INTERLEAVING 34
299
300#define DTV_API_VERSION 35
301
302#define DTV_CODE_RATE_HP 36
303#define DTV_CODE_RATE_LP 37
304#define DTV_GUARD_INTERVAL 38
305#define DTV_TRANSMISSION_MODE 39
306#define DTV_HIERARCHY 40
307
308#define DTV_ISDBT_LAYER_ENABLED 41
309
310#define DTV_ISDBS_TS_ID 42
311
312#define DTV_DVBT2_PLP_ID 43
313
314#define DTV_ENUM_DELSYS 44
315
316#define DTV_MAX_COMMAND DTV_ENUM_DELSYS
317
318typedef enum fe_pilot {
319 PILOT_ON,
320 PILOT_OFF,
321 PILOT_AUTO,
322} fe_pilot_t;
323
324typedef enum fe_rolloff {
325 ROLLOFF_35,
326 ROLLOFF_20,
327 ROLLOFF_25,
328 ROLLOFF_AUTO,
329} fe_rolloff_t;
330
331typedef enum fe_delivery_system {
332 SYS_UNDEFINED,
333 SYS_DVBC_ANNEX_A,
334 SYS_DVBC_ANNEX_B,
335 SYS_DVBT,
336 SYS_DSS,
337 SYS_DVBS,
338 SYS_DVBS2,
339 SYS_DVBH,
340 SYS_ISDBT,
341 SYS_ISDBS,
342 SYS_ISDBC,
343 SYS_ATSC,
344 SYS_ATSCMH,
345 SYS_DMBTH,
346 SYS_CMMB,
347 SYS_DAB,
348 SYS_DVBT2,
349 SYS_TURBO,
350 SYS_DVBC_ANNEX_C,
351} fe_delivery_system_t;
352
353
354#define SYS_DVBC_ANNEX_AC SYS_DVBC_ANNEX_A
355
356
357struct dtv_cmds_h {
358 char *name;
359
360 __u32 cmd;
361
362
363 __u32 set:1;
364 __u32 buffer:1;
365 __u32 reserved:30;
366};
367
368struct dtv_property {
369 __u32 cmd;
370 __u32 reserved[3];
371 union {
372 __u32 data;
373 struct {
374 __u8 data[32];
375 __u32 len;
376 __u32 reserved1[3];
377 void *reserved2;
378 } buffer;
379 } u;
380 int result;
381} __attribute__ ((packed));
382
383#define DTV_IOCTL_MAX_MSGS 64
384
385struct dtv_properties {
386 __u32 num;
387 struct dtv_property *props;
388};
389
390#define FE_SET_PROPERTY _IOW('o', 82, struct dtv_properties)
391#define FE_GET_PROPERTY _IOR('o', 83, struct dtv_properties)
392
393
394#define FE_TUNE_MODE_ONESHOT 0x01
395
396
397#define FE_GET_INFO _IOR('o', 61, struct dvb_frontend_info)
398
399#define FE_DISEQC_RESET_OVERLOAD _IO('o', 62)
400#define FE_DISEQC_SEND_MASTER_CMD _IOW('o', 63, struct dvb_diseqc_master_cmd)
401#define FE_DISEQC_RECV_SLAVE_REPLY _IOR('o', 64, struct dvb_diseqc_slave_reply)
402#define FE_DISEQC_SEND_BURST _IO('o', 65)
403
404#define FE_SET_TONE _IO('o', 66)
405#define FE_SET_VOLTAGE _IO('o', 67)
406#define FE_ENABLE_HIGH_LNB_VOLTAGE _IO('o', 68)
407
408#define FE_READ_STATUS _IOR('o', 69, fe_status_t)
409#define FE_READ_BER _IOR('o', 70, __u32)
410#define FE_READ_SIGNAL_STRENGTH _IOR('o', 71, __u16)
411#define FE_READ_SNR _IOR('o', 72, __u16)
412#define FE_READ_UNCORRECTED_BLOCKS _IOR('o', 73, __u32)
413
414#define FE_SET_FRONTEND _IOW('o', 76, struct dvb_frontend_parameters)
415#define FE_GET_FRONTEND _IOR('o', 77, struct dvb_frontend_parameters)
416#define FE_SET_FRONTEND_TUNE_MODE _IO('o', 81)
417#define FE_GET_EVENT _IOR('o', 78, struct dvb_frontend_event)
418
419#define FE_DISHNETWORK_SEND_LEGACY_CMD _IO('o', 80)
420
421#endif