commit 02db5a83e6ef5b315308481b3a711f2c8709ffa5
author Patrick Daly <pdaly@codeaurora.org> Fri Aug 24 14:22:06 2012 -0700
committer Neha Pandey <nehap@codeaurora.org> Thu Nov 29 17:31:43 2012 -0800
tree d4a36d6b03232df7e83aba86b781778b88b5f69e
parent a133dbf8383e3bc944c86cb7a6063e720295f8af

msm: acpuclock-8064: Add support for multiple speed and PVS bins.

Add support for 1.7 GHz and 2.0 GHz parts and their corresponding
L2 and memory bandwidth votes.

Support selecting different PVS tables based upon EFUSE speed bin
across all krait targets.

Signed-off-by: Patrick Daly <pdaly@codeaurora.org>

Conflicts:

	arch/arm/mach-msm/acpuclock-8064.c

Change-Id: I560371c3c5476f72444a8f2a88b9c441f3451ae1
Signed-off-by: Neha Pandey <nehap@codeaurora.org>

arch/arm/mach-msm/acpuclock-8960ab.c

diff --git a/arch/arm/mach-msm/acpuclock-8960ab.c b/arch/arm/mach-msm/acpuclock-8960ab.c
index 91ccd37..ae1cd7b 100644
--- a/arch/arm/mach-msm/acpuclock-8960ab.c
+++ b/arch/arm/mach-msm/acpuclock-8960ab.c
@@ -135,10 +135,10 @@
 	{ 0, { 0 } }
 };
 
-static struct pvs_table pvs_tables[NUM_PVS] __initdata = {
-[PVS_SLOW]    = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow),  0 },
-[PVS_NOMINAL] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow),  0 },
-[PVS_FAST]    = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow),  0 },
+static struct pvs_table pvs_tables[NUM_SPEED_BINS][NUM_PVS] __initdata = {
+[0][PVS_SLOW]    = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow),  0 },
+[0][PVS_NOMINAL] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow),  0 },
+[0][PVS_FAST]    = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow),  0 },
 };
 
 static struct acpuclk_krait_params acpuclk_8960ab_params __initdata = {