[PATCH] ppc32: 8xx commproc avoid direct pte manipulation, use dma coherent API instead
Touching the pte directly causes the 8Mbyte TLB entry to be invalidated.
This has been fixed in v2.4 for ages.
Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c
index 67194c1..11726e2 100644
--- a/arch/ppc/8xx_io/commproc.c
+++ b/arch/ppc/8xx_io/commproc.c
@@ -39,8 +39,6 @@
#include <asm/tlbflush.h>
#include <asm/rheap.h>
-extern int get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep);
-
static void m8xx_cpm_dpinit(void);
static uint host_buffer; /* One page of host buffer */
static uint host_end; /* end + 1 */
@@ -108,14 +106,11 @@
.end = cpm_eoi,
};
-extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
-
void
-m8xx_cpm_reset(uint bootpage)
+m8xx_cpm_reset(void)
{
volatile immap_t *imp;
volatile cpm8xx_t *commproc;
- pte_t *pte;
imp = (immap_t *)IMAP_ADDR;
commproc = (cpm8xx_t *)&imp->im_cpm;
@@ -143,17 +138,6 @@
/* Reclaim the DP memory for our use. */
m8xx_cpm_dpinit();
- /* get the PTE for the bootpage */
- if (!get_pteptr(&init_mm, bootpage, &pte))
- panic("get_pteptr failed\n");
-
- /* and make it uncachable */
- pte_val(*pte) |= _PAGE_NO_CACHE;
- _tlbie(bootpage);
-
- host_buffer = bootpage;
- host_end = host_buffer + PAGE_SIZE;
-
/* Tell everyone where the comm processor resides.
*/
cpmp = (cpm8xx_t *)commproc;