)]}'
{
  "commit": "086e8ced65d9bcc4a8e8f1cd39b09640f2883f90",
  "tree": "3d0e6ee303ab0cce2bd3319a5a24bc94c37538eb",
  "parents": [
    "254e42006c893f45bca48f313536fcba12206418"
  ],
  "author": {
    "name": "Kenji Kaneshige",
    "email": "kaneshige.kenji@jp.fujitsu.com",
    "time": "Wed Dec 01 09:40:32 2010 -0800"
  },
  "committer": {
    "name": "H. Peter Anvin",
    "email": "hpa@linux.intel.com",
    "time": "Mon Dec 13 16:52:52 2010 -0800"
  },
  "message": "x86, vt-d: Fix the vt-d fault handling irq migration in the x2apic mode\n\nIn x2apic mode, we need to set the upper address register of the fault\nhandling interrupt register of the vt-d hardware. Without this\nirq migration of the vt-d fault handling interrupt is broken.\n\nSigned-off-by: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nLKML-Reference: \u003c1291225233.2648.39.camel@sbsiddha-MOBL3\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: stable@kernel.org [v2.6.32+]\nAcked-by: Chris Wright \u003cchrisw@sous-sol.org\u003e\nTested-by: Takao Indoh \u003cindou.takao@jp.fujitsu.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@linux.intel.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "226060eec3416fb5f2171757337c380f323db72d",
      "old_mode": 33188,
      "old_path": "arch/x86/kernel/apic/io_apic.c",
      "new_id": "fadcd743a74f8bdcd5effbaf7e28b01ea3003532",
      "new_mode": 33188,
      "new_path": "arch/x86/kernel/apic/io_apic.c"
    }
  ]
}