commit 0c0f5e9440469c5dce28feb7374c9654df6b6f63
author Jeff Hugo <jhugo@codeaurora.org> Wed Sep 28 13:55:45 2011 -0600
committer Jeff Hugo <jhugo@codeaurora.org> Mon Oct 17 13:48:25 2011 -0600
tree 9855e912f5115d6f7e5962f7842ac5dbca092b69
parent f9f07c34c896edc474013dc6cdb34ba3164eb68b

msm: smd: add smd support to 8064

Change-Id: I70446298141897ce0a632ba839e56b18e70940f2
Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>

arch/arm/mach-msm/smd.c

diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c
index 7dec32a..94dd8b8 100644
--- a/arch/arm/mach-msm/smd.c
+++ b/arch/arm/mach-msm/smd.c
@@ -43,15 +43,17 @@
 
 #if defined(CONFIG_ARCH_QSD8X50) || defined(CONFIG_ARCH_MSM8X60) \
 	|| defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_FSM9XXX) \
-	|| defined(CONFIG_ARCH_MSM9615)
+	|| defined(CONFIG_ARCH_MSM9615)	|| defined(CONFIG_ARCH_APQ8064)
 #define CONFIG_QDSP6 1
 #endif
 
-#if defined(CONFIG_ARCH_MSM8X60) || defined(CONFIG_ARCH_MSM8960)
+#if defined(CONFIG_ARCH_MSM8X60) || defined(CONFIG_ARCH_MSM8960) \
+	|| defined(CONFIG_ARCH_APQ8064)
 #define CONFIG_DSPS 1
 #endif
 
-#if defined(CONFIG_ARCH_MSM8960)
+#if defined(CONFIG_ARCH_MSM8960) \
+	|| defined(CONFIG_ARCH_APQ8064)
 #define CONFIG_WCNSS 1
 #define CONFIG_DSPS_SMSM 1
 #endif
@@ -200,6 +202,23 @@
 #define MSM_TRIG_A2DSPS_SMSM_INT
 #define MSM_TRIG_A2WCNSS_SMD_INT
 #define MSM_TRIG_A2WCNSS_SMSM_INT
+#elif defined(CONFIG_ARCH_APQ8064)
+#define MSM_TRIG_A2M_SMD_INT     \
+			(smd_write_intr(1 << 3, MSM_APCS_GCC_BASE + 0x8))
+#define MSM_TRIG_A2Q6_SMD_INT    \
+			(smd_write_intr(1 << 15, MSM_APCS_GCC_BASE + 0x8))
+#define MSM_TRIG_A2M_SMSM_INT    \
+			(smd_write_intr(1 << 4, MSM_APCS_GCC_BASE + 0x8))
+#define MSM_TRIG_A2Q6_SMSM_INT   \
+			(smd_write_intr(1 << 14, MSM_APCS_GCC_BASE + 0x8))
+#define MSM_TRIG_A2DSPS_SMD_INT  \
+			(smd_write_intr(1, MSM_SIC_NON_SECURE_BASE + 0x4080))
+#define MSM_TRIG_A2DSPS_SMSM_INT \
+			(smd_write_intr(1, MSM_SIC_NON_SECURE_BASE + 0x4094))
+#define MSM_TRIG_A2WCNSS_SMD_INT  \
+			(smd_write_intr(1 << 25, MSM_APCS_GCC_BASE + 0x8))
+#define MSM_TRIG_A2WCNSS_SMSM_INT  \
+			(smd_write_intr(1 << 23, MSM_APCS_GCC_BASE + 0x8))
 #elif defined(CONFIG_ARCH_FSM9XXX)
 #define MSM_TRIG_A2Q6_SMD_INT	\
 			(smd_write_intr(1 << 10, MSM_GCC_BASE + 0x8))