)]}'
{
  "commit": "0e6140a56f2878816ecf9db50f40133d25d987e4",
  "tree": "672b1af7086bcb712839756fb31f6d662525ab54",
  "parents": [
    "47c0bd1ae24c34e851cf0f2b02ef2a6847d7ae15"
  ],
  "author": {
    "name": "Benjamin Herrenschmidt",
    "email": "benh@kernel.crashing.org",
    "time": "Fri Dec 21 15:39:22 2007 +1100"
  },
  "committer": {
    "name": "Josh Boyer",
    "email": "jwboyer@linux.vnet.ibm.com",
    "time": "Sun Dec 23 13:12:11 2007 -0600"
  },
  "message": "[POWERPC] 4xx: Improve support for 4xx indirect DCRs\n\nAccessing indirect DCRs is done via a pair of address/data DCRs.\n\nSuch accesses are thus inherently racy, vs. interrupts, preemption\nand possibly SMP if 4xx SMP cores are ever used.\n\nThis updates the mfdcri/mtdcri macros in dcr-native.h (which were\nso far unused) to use a spinlock.\n\nIn addition, add some common definitions to a new dcr-regs.h file.\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Josh Boyer \u003cjwboyer@linux.vnet.ibm.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "8dbb1ab0aa04d2fce6a0e4c858ee0357875e2cc1",
      "old_mode": 33188,
      "old_path": "include/asm-powerpc/dcr-native.h",
      "new_id": "af5fb31af559d6dbf5a0ecb95f1705d952419fa5",
      "new_mode": 33188,
      "new_path": "include/asm-powerpc/dcr-native.h"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "9f1fb98fcdc6ad370e7962b6391f06ce1123694e",
      "new_mode": 33188,
      "new_path": "include/asm-powerpc/dcr-regs.h"
    }
  ]
}