msm: qdsp5: Protect avsync mask access with spin lock to make it SMP safe
avsync mask gets accessed in both process and Adsp ISR context. local
irq is disabled while accessing this variable on process context,
this ensures that avsync doesn't get accessed concurrently in
Adsp ISR context. But this holds true only for uniprocessor
environment, On multi-processor Adsp ISR may come on other core
which may result in inconsistent value of avsync mask.
Fix this by protecting avsync mask with spin lock.
Change-Id: I711b152b512502484c2382be633b3887c9600334
Signed-off-by: Manish Dewangan <manish@codeaurora.org>
diff --git a/arch/arm/mach-msm/qdsp5/audpp.c b/arch/arm/mach-msm/qdsp5/audpp.c
index 54e45b4..2dbb5dc 100644
--- a/arch/arm/mach-msm/qdsp5/audpp.c
+++ b/arch/arm/mach-msm/qdsp5/audpp.c
@@ -124,6 +124,8 @@
uint16_t avsync[CH_COUNT * AUDPP_CLNT_MAX_COUNT + 1];
struct audpp_event_callback *cb_tbl[MAX_EVENT_CALLBACK_CLIENTS];
+ spinlock_t avsync_lock;
+
wait_queue_head_t event_wait;
};
@@ -249,10 +251,12 @@
void (*getevent) (void *ptr, size_t len))
{
struct audpp_state *audpp = data;
+ unsigned long flags;
uint16_t msg[8];
int cid = 0;
if (id == AUDPP_MSG_AVSYNC_MSG) {
+ spin_lock_irqsave(&audpp->avsync_lock, flags);
getevent(audpp->avsync, sizeof(audpp->avsync));
/* mask off any channels we're not watching to avoid
@@ -261,6 +265,7 @@
* we next read...
*/
audpp->avsync[0] &= audpp->avsync_mask;
+ spin_unlock_irqrestore(&audpp->avsync_lock, flags);
return;
}
@@ -442,13 +447,13 @@
if (BAD_ID(id))
return;
- local_irq_save(flags);
+ spin_lock_irqsave(&the_audpp_state.avsync_lock, flags);
if (rate)
the_audpp_state.avsync_mask |= (1 << id);
else
the_audpp_state.avsync_mask &= (~(1 << id));
the_audpp_state.avsync[0] &= the_audpp_state.avsync_mask;
- local_irq_restore(flags);
+ spin_unlock_irqrestore(&the_audpp_state.avsync_lock, flags);
cmd.cmd_id = AUDPP_CMD_AVSYNC;
cmd.object_number = id;
@@ -460,7 +465,8 @@
unsigned audpp_avsync_sample_count(int id)
{
- uint16_t *avsync = the_audpp_state.avsync;
+ struct audpp_state *audpp = &the_audpp_state;
+ uint16_t *avsync = audpp->avsync;
unsigned val;
unsigned long flags;
unsigned mask;
@@ -470,12 +476,12 @@
mask = 1 << id;
id = id * AUDPP_AVSYNC_INFO_SIZE + 2;
- local_irq_save(flags);
+ spin_lock_irqsave(&audpp->avsync_lock, flags);
if (avsync[0] & mask)
val = (avsync[id] << 16) | avsync[id + 1];
else
val = 0;
- local_irq_restore(flags);
+ spin_unlock_irqrestore(&audpp->avsync_lock, flags);
return val;
}
@@ -483,7 +489,8 @@
unsigned audpp_avsync_byte_count(int id)
{
- uint16_t *avsync = the_audpp_state.avsync;
+ struct audpp_state *audpp = &the_audpp_state;
+ uint16_t *avsync = audpp->avsync;
unsigned val;
unsigned long flags;
unsigned mask;
@@ -493,12 +500,12 @@
mask = 1 << id;
id = id * AUDPP_AVSYNC_INFO_SIZE + 5;
- local_irq_save(flags);
+ spin_lock_irqsave(&audpp->avsync_lock, flags);
if (avsync[0] & mask)
val = (avsync[id] << 16) | avsync[id + 1];
else
val = 0;
- local_irq_restore(flags);
+ spin_unlock_irqrestore(&audpp->avsync_lock, flags);
return val;
}
@@ -848,6 +855,8 @@
init_waitqueue_head(&audpp->event_wait);
+ spin_lock_init(&audpp->avsync_lock);
+
for (idx = 0; idx < audpp->dec_database->num_dec; idx++) {
audpp->dec_info_table[idx].codec = -1;
audpp->dec_info_table[idx].pid = 0;