)]}'
{
  "commit": "124c27d375f72dd857eac27f2932f9f01df76bf4",
  "tree": "927a58733ee4b35eca6958f42af19e0d97124964",
  "parents": [
    "e9efed3b80a83e44b98fc626f3268ae072550b84"
  ],
  "author": {
    "name": "Nathan Lynch",
    "email": "ntl@pobox.com",
    "time": "Sun Jul 27 15:24:55 2008 +1000"
  },
  "committer": {
    "name": "Benjamin Herrenschmidt",
    "email": "benh@kernel.crashing.org",
    "time": "Mon Jul 28 16:30:52 2008 +1000"
  },
  "message": "powerpc: Show processor cache information in sysfs\n\nCollect cache information from the OF device tree and display it in\nthe cpu hierarchy in sysfs.  This is intended to be compatible at the\nuserspace level with x86\u0027s implementation[1], hence some of the funny\nattribute names.  The arrangement of cache info is not immediately\nintuitive, but (again) it\u0027s for compatibility\u0027s sake.\n\nThe cache attributes exposed are:\n\ntype (Data, Instruction, or Unified)\nlevel (1, 2, 3...)\nsize\ncoherency_line_size\nnumber_of_sets\nways_of_associativity\n\nAll of these can be derived on platforms that follow the OF PowerPC\nProcessor binding.  The code \"publishes\" only those attributes for\nwhich it is able to determine values; attributes for values which\ncannot be determined are not created at all.\n\n[1] arch/x86/kernel/cpu/intel_cacheinfo.c\n\nBenH: Turned some printk\u0027s into pr_debug, added better NULL checking\nin a couple of places.\n\nSigned-off-by: Nathan Lynch \u003cntl@pobox.com\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "156808086cacd6135b6f1048e2a5762a1c89bedf",
      "old_mode": 33188,
      "old_path": "arch/powerpc/kernel/sysfs.c",
      "new_id": "56d172d16e5654b483e2ddaa087c9c6302e6e42d",
      "new_mode": 33188,
      "new_path": "arch/powerpc/kernel/sysfs.c"
    }
  ]
}