msm: msm_iomap: Unify the IO map for 7x27a and 8625
This unification will help in the single binary for 7627a and 8625, 8k
where the virtual address remain the same irrespective of different base
addresses.
Change-Id: I9c67c9fec5c7b9e233c5514ab3c57a79a9af2d3b
Signed-off-by: Taniya Das <tdas@codeaurora.org>
diff --git a/arch/arm/mach-msm/board-msm7627a-camera.c b/arch/arm/mach-msm/board-msm7627a-camera.c
index bde38c3..e3f668f 100644
--- a/arch/arm/mach-msm/board-msm7627a-camera.c
+++ b/arch/arm/mach-msm/board-msm7627a-camera.c
@@ -479,8 +479,8 @@
.ioext.csiirq = INT_CSI_IRQ_1,
.ioclk.mclk_clk_rate = 24000000,
.ioclk.vfe_clk_rate = 192000000,
- .ioext.appphy = MSM_CLK_CTL_PHYS,
- .ioext.appsz = MSM_CLK_CTL_SIZE,
+ .ioext.appphy = MSM7XXX_CLK_CTL_PHYS,
+ .ioext.appsz = MSM7XXX_CLK_CTL_SIZE,
};
struct msm_camera_device_platform_data msm_camera_device_data_front = {
@@ -491,8 +491,8 @@
.ioext.csiirq = INT_CSI_IRQ_0,
.ioclk.mclk_clk_rate = 24000000,
.ioclk.vfe_clk_rate = 192000000,
- .ioext.appphy = MSM_CLK_CTL_PHYS,
- .ioext.appsz = MSM_CLK_CTL_SIZE,
+ .ioext.appphy = MSM7XXX_CLK_CTL_PHYS,
+ .ioext.appsz = MSM7XXX_CLK_CTL_SIZE,
};
#ifdef CONFIG_S5K4E1
diff --git a/arch/arm/mach-msm/board-msm7x27.c b/arch/arm/mach-msm/board-msm7x27.c
index 9385a58..5c189fe 100644
--- a/arch/arm/mach-msm/board-msm7x27.c
+++ b/arch/arm/mach-msm/board-msm7x27.c
@@ -1063,10 +1063,10 @@
static struct msm_camera_device_platform_data msm_camera_device_data = {
.camera_gpio_on = config_camera_on_gpios,
.camera_gpio_off = config_camera_off_gpios,
- .ioext.mdcphy = MSM_MDC_PHYS,
- .ioext.mdcsz = MSM_MDC_SIZE,
- .ioext.appphy = MSM_CLK_CTL_PHYS,
- .ioext.appsz = MSM_CLK_CTL_SIZE,
+ .ioext.mdcphy = MSM7XXX_MDC_PHYS,
+ .ioext.mdcsz = MSM7XXX_MDC_SIZE,
+ .ioext.appphy = MSM7XXX_CLK_CTL_PHYS,
+ .ioext.appsz = MSM7XXX_CLK_CTL_SIZE,
};
int pmic_set_flash_led_current(enum pmic8058_leds id, unsigned mA)
diff --git a/arch/arm/mach-msm/devices-msm7x27.c b/arch/arm/mach-msm/devices-msm7x27.c
index cdb43ad..b895870 100644
--- a/arch/arm/mach-msm/devices-msm7x27.c
+++ b/arch/arm/mach-msm/devices-msm7x27.c
@@ -43,8 +43,8 @@
.flags = IORESOURCE_IRQ,
},
{
- .start = MSM_UART1_PHYS,
- .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
+ .start = MSM7XXX_UART1_PHYS,
+ .end = MSM7XXX_UART1_PHYS + MSM7XXX_UART1_SIZE - 1,
.flags = IORESOURCE_MEM,
},
};
@@ -56,8 +56,8 @@
.flags = IORESOURCE_IRQ,
},
{
- .start = MSM_UART2_PHYS,
- .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
+ .start = MSM7XXX_UART2_PHYS,
+ .end = MSM7XXX_UART2_PHYS + MSM7XXX_UART2_SIZE - 1,
.flags = IORESOURCE_MEM,
},
};
diff --git a/arch/arm/mach-msm/devices-msm7x27a.c b/arch/arm/mach-msm/devices-msm7x27a.c
index 6a59b08..e414458 100644
--- a/arch/arm/mach-msm/devices-msm7x27a.c
+++ b/arch/arm/mach-msm/devices-msm7x27a.c
@@ -228,8 +228,8 @@
.flags = IORESOURCE_IRQ,
},
{
- .start = MSM_UART1_PHYS,
- .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
+ .start = MSM7XXX_UART1_PHYS,
+ .end = MSM7XXX_UART1_PHYS + MSM7XXX_UART1_SIZE - 1,
.flags = IORESOURCE_MEM,
},
};
@@ -573,8 +573,8 @@
static struct resource msm_clkctl_resources[] = {
{
.name = "clk_ctl",
- .start = MSM_CLK_CTL_PHYS,
- .end = MSM_CLK_CTL_PHYS + MSM_CLK_CTL_SIZE - 1,
+ .start = MSM7XXX_CLK_CTL_PHYS,
+ .end = MSM7XXX_CLK_CTL_PHYS + MSM7XXX_CLK_CTL_SIZE - 1,
.flags = IORESOURCE_MEM,
},
};
@@ -802,8 +802,8 @@
.flags = IORESOURCE_IRQ,
},
{
- .start = MSM_UART1_PHYS,
- .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
+ .start = MSM7XXX_UART1_PHYS,
+ .end = MSM7XXX_UART1_PHYS + MSM7XXX_UART1_SIZE - 1,
.flags = IORESOURCE_MEM,
},
};
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h b/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
index ba50a30..88bc3c6 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
@@ -35,80 +35,43 @@
*
*/
-#define MSM_VIC_BASE IOMEM(0xFA000000)
-#define MSM_VIC_PHYS 0xC0000000
-#define MSM_VIC_SIZE SZ_4K
+#define MSM7XXX_VIC_PHYS 0xC0000000
+#define MSM7XXX_VIC_SIZE SZ_4K
-#define MSM_CSR_BASE IOMEM(0xFA001000)
-#define MSM_CSR_PHYS 0xC0100000
-#define MSM_CSR_SIZE SZ_4K
+#define MSM7XXX_CSR_PHYS 0xC0100000
+#define MSM7XXX_CSR_SIZE SZ_4K
-#define MSM_TMR_PHYS MSM_CSR_PHYS
-#define MSM_TMR_BASE MSM_CSR_BASE
-#define MSM_TMR_SIZE SZ_4K
+#define MSM7XXX_TMR_PHYS MSM7XXX_CSR_PHYS
+#define MSM7XXX_TMR_SIZE SZ_4K
-#define MSM_TMR0_BASE MSM_TMR_BASE
+#define MSM7XXX_TMR0_PHYS 0xC0800000
+#define MSM7XXX_TMR0_SIZE SZ_4K
-#define MSM_GPIO1_BASE IOMEM(0xFA003000)
-#define MSM_GPIO1_PHYS 0xA9200000
-#define MSM_GPIO1_SIZE SZ_4K
+#define MSM7XXX_GPIO1_PHYS 0xA9200000
+#define MSM7XXX_GPIO1_SIZE SZ_4K
-#define MSM_GPIO2_BASE IOMEM(0xFA004000)
-#define MSM_GPIO2_PHYS 0xA9300000
-#define MSM_GPIO2_SIZE SZ_4K
+#define MSM7XXX_GPIO2_PHYS 0xA9300000
+#define MSM7XXX_GPIO2_SIZE SZ_4K
-#define MSM_CLK_CTL_BASE IOMEM(0xFA005000)
-#define MSM_CLK_CTL_PHYS 0xA8600000
-#define MSM_CLK_CTL_SIZE SZ_4K
+#define MSM7XXX_CLK_CTL_PHYS 0xA8600000
+#define MSM7XXX_CLK_CTL_SIZE SZ_4K
-#define MSM_L2CC_BASE IOMEM(0xFA006000)
-#define MSM_L2CC_PHYS 0xC0400000
-#define MSM_L2CC_SIZE SZ_4K
+#define MSM7XXX_L2CC_PHYS 0xC0400000
+#define MSM7XXX_L2CC_SIZE SZ_4K
-#define MSM_QGIC_DIST_BASE IOMEM(0xFA000000)
-#define MSM_QGIC_DIST_PHYS 0xC0000000
-#define MSM_QGIC_DIST_SIZE SZ_4K
+#define MSM7XXX_UART1_PHYS 0xA9A00000
+#define MSM7XXX_UART1_SIZE SZ_4K
-#define MSM_QGIC_CPU_BASE IOMEM(0xFA007000)
-#define MSM_QGIC_CPU_PHYS 0xC0002000
-#define MSM_QGIC_CPU_SIZE SZ_256
+#define MSM7XXX_UART2_PHYS 0xA9B00000
+#define MSM7XXX_UART2_SIZE SZ_4K
-#define MSM_SCU_BASE IOMEM(0xFA008000)
-#define MSM_SCU_PHYS 0xC0600000
-#define MSM_SCU_SIZE SZ_256
+#define MSM7XXX_UART3_PHYS 0xA9C00000
+#define MSM7XXX_UART3_SIZE SZ_4K
-#define MSM_SPM0_BASE IOMEM(0xFA009000)
-#define MSM_SPM0_PHYS 0xC0200000
-#define MSM_SPM0_SIZE SZ_4K
+#define MSM7XXX_MDC_PHYS 0xAA500000
+#define MSM7XXX_MDC_SIZE SZ_1M
-#define MSM_SPM1_BASE IOMEM(0xFA00A000)
-#define MSM_SPM1_PHYS 0xC0700000
-#define MSM_SPM1_SIZE SZ_4K
-
-#define MSM_CFG_CTL_BASE IOMEM(0xFA00B000)
-#define MSM_CFG_CTL_PHYS 0xA9800000
-#define MSM_CFG_CTL_SIZE SZ_4K
-
-#define MSM_SHARED_RAM_BASE IOMEM(0xFA100000)
-#define MSM_SHARED_RAM_SIZE SZ_1M
-
-#define MSM_UART1_PHYS 0xA9A00000
-#define MSM_UART1_SIZE SZ_4K
-
-#define MSM_UART2_PHYS 0xA9B00000
-#define MSM_UART2_SIZE SZ_4K
-
-#define MSM_UART3_PHYS 0xA9C00000
-#define MSM_UART3_SIZE SZ_4K
-
-#define MSM_MDC_BASE IOMEM(0xFA200000)
-#define MSM_MDC_PHYS 0xAA500000
-#define MSM_MDC_SIZE SZ_1M
-
-#define MSM_AD5_BASE IOMEM(0xFA300000)
-#define MSM_AD5_PHYS 0xAC000000
-#define MSM_AD5_SIZE (SZ_1M*13)
-
-#define MSM_STRONGLY_ORDERED_PAGE 0xFA0F0000
+#define MSM7XXX_AD5_PHYS 0xAC000000
+#define MSM7XXX_AD5_SIZE (SZ_1M*13)
#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8625.h b/arch/arm/mach-msm/include/mach/msm_iomap-8625.h
new file mode 100644
index 0000000..8088a4c
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8625.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ *
+ * The MSM peripherals are spread all over across 768MB of physical
+ * space, which makes just having a simple IO_ADDRESS macro to slide
+ * them into the right virtual location rough. Instead, we will
+ * provide a master phys->virt mapping for peripherals here.
+ *
+ */
+
+#ifndef __ASM_ARCH_MSM_IOMAP_8625_H
+#define __ASM_ARCH_MSM_IOMAP_8625_H
+
+/* Physical base address and size of peripherals.
+ * Ordered by the virtual base addresses they will be mapped at.
+ *
+ * If you add or remove entries here, you'll want to edit the
+ * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
+ * changes.
+ *
+ */
+
+#define MSM8625_TMR_PHYS 0xC0800000
+#define MSM8625_TMR_SIZE SZ_4K
+
+#define MSM8625_TMR0_PHYS 0xC0100000
+#define MSM8625_TMR0_SIZE SZ_4K
+
+#define MSM8625_CLK_CTL_PHYS 0xA8600000
+#define MSM8625_CLK_CTL_SIZE SZ_4K
+
+#define MSM8625_QGIC_DIST_PHYS 0xC0000000
+#define MSM8625_QGIC_DIST_SIZE SZ_4K
+
+#define MSM8625_QGIC_CPU_PHYS 0xC0002000
+#define MSM8625_QGIC_CPU_SIZE SZ_4K
+
+#define MSM8625_SCU_PHYS 0xC0600000
+#define MSM8625_SCU_SIZE SZ_256
+
+#define MSM8625_SPM0_PHYS 0xC0200000
+#define MSM8625_SPM0_SIZE SZ_4K
+
+#define MSM8625_SPM1_PHYS 0xC0700000
+#define MSM8625_SPM1_SIZE SZ_4K
+
+#define MSM8625_CFG_CTL_PHYS 0xA9800000
+#define MSM8625_CFG_CTL_SIZE SZ_4K
+
+#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index ff0b368..ca8daaa 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -1,6 +1,6 @@
/*
* Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2008-2012, Code Aurora Forum. All rights reserved.
* Author: Brian Swetland <swetland@google.com>
*
* This software is licensed under the terms of the GNU General Public
@@ -47,7 +47,10 @@
#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064) || \
defined(CONFIG_ARCH_MSM8930) || defined(CONFIG_ARCH_MSM9615) || \
- defined(CONFIG_ARCH_MSMCOPPER)
+ defined(CONFIG_ARCH_MSMCOPPER) || defined(CONFIG_ARCH_MSM7X27) || \
+ defined(CONFIG_ARCH_MSM7X01A) || defined(CONFIG_ARCH_MSM7X25) || \
+ defined(CONFIG_ARCH_MSM8625)
+
/* Unified iomap */
#define MSM_TMR_BASE IOMEM(0xFA000000) /* 4K */
@@ -79,8 +82,21 @@
#define MSM_APCS_GLB_BASE IOMEM(0xFA702000) /* 4K */
#define MSM_SAW2_BASE IOMEM(0xFA703000) /* 4k */
#define MSM_SAW3_BASE IOMEM(0xFA704000) /* 4k */
+#define MSM_VIC_BASE IOMEM(0xFA705000) /* 4K */
+#define MSM_CSR_BASE MSM_TMR_BASE /* 4K */
+#define MSM_GPIO1_BASE IOMEM(0xFA706000) /* 4K */
+#define MSM_GPIO2_BASE IOMEM(0xFA707000) /* 4K */
+#define MSM_SCU_BASE IOMEM(0xFA708000) /* 4K */
+#define MSM_SPM0_BASE IOMEM(0xFA709000) /* 4K */
+#define MSM_SPM1_BASE IOMEM(0xFA70A000) /* 4K */
+#define MSM_CFG_CTL_BASE IOMEM(0xFA70B000) /* 4K */
+#define MSM_MDC_BASE IOMEM(0xFA70C000) /* 4K */
+#define MSM_AD5_BASE IOMEM(0xFA70D000) /* 4K */
-#if defined(CONFIG_ARCH_MSM9615)
+
+#define MSM_STRONGLY_ORDERED_PAGE 0xFA0F0000
+
+#if defined(CONFIG_ARCH_MSM9615) || defined(CONFIG_ARCH_MSM7X27)
#define MSM_SHARED_RAM_SIZE SZ_1M
#else
#define MSM_SHARED_RAM_SIZE SZ_2M
@@ -91,6 +107,8 @@
#include "msm_iomap-8064.h"
#include "msm_iomap-9615.h"
#include "msm_iomap-copper.h"
+#include "msm_iomap-7xxx.h"
+#include "msm_iomap-8625.h"
#else
/* Legacy single-target iomap */
@@ -104,7 +122,7 @@
#elif defined(CONFIG_ARCH_FSM9XXX)
#include "msm_iomap-fsm9xxx.h"
#else
-#include "msm_iomap-7xxx.h"
+#error "Target compiling without iomap"
#endif
#if defined(CONFIG_DEBUG_MSM_UART1)
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 79c9aed..db64acf 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -58,23 +58,23 @@
#if defined(CONFIG_ARCH_MSM7X01A) || defined(CONFIG_ARCH_MSM7X27) \
|| defined(CONFIG_ARCH_MSM7X25)
static struct map_desc msm_io_desc[] __initdata = {
- MSM_DEVICE(VIC),
- MSM_DEVICE(CSR),
- MSM_DEVICE(TMR),
- MSM_DEVICE(GPIO1),
- MSM_DEVICE(GPIO2),
- MSM_DEVICE(CLK_CTL),
- MSM_DEVICE(AD5),
- MSM_DEVICE(MDC),
+ MSM_CHIP_DEVICE(VIC, MSM7XXX),
+ MSM_CHIP_DEVICE(CSR, MSM7XXX),
+ MSM_CHIP_DEVICE(TMR, MSM7XXX),
+ MSM_CHIP_DEVICE(GPIO1, MSM7XXX),
+ MSM_CHIP_DEVICE(GPIO2, MSM7XXX),
+ MSM_CHIP_DEVICE(CLK_CTL, MSM7XXX),
+ MSM_CHIP_DEVICE(AD5, MSM7XXX),
+ MSM_CHIP_DEVICE(MDC, MSM7XXX),
#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
defined(CONFIG_DEBUG_MSM_UART3)
- MSM_DEVICE(DEBUG_UART),
+ MSM_CHIP_DEVICE(DEBUG_UART, MSM7XXX),
#endif
#ifdef CONFIG_CACHE_L2X0
{
.virtual = (unsigned long) MSM_L2CC_BASE,
- .pfn = __phys_to_pfn(MSM_L2CC_PHYS),
- .length = MSM_L2CC_SIZE,
+ .pfn = __phys_to_pfn(MSM7XXX_L2CC_PHYS),
+ .length = MSM7XXX_L2CC_SIZE,
.type = MT_DEVICE,
},
#endif
@@ -399,27 +399,27 @@
#ifdef CONFIG_ARCH_MSM8625
static struct map_desc msm8625_io_desc[] __initdata = {
- MSM_DEVICE(QGIC_DIST),
- MSM_DEVICE(QGIC_CPU),
- MSM_DEVICE(TMR),
- MSM_DEVICE(TMR0),
- MSM_DEVICE(CSR),
- MSM_DEVICE(SCU),
- MSM_DEVICE(CFG_CTL),
- MSM_DEVICE(GPIO1),
- MSM_DEVICE(GPIO2),
- MSM_DEVICE(CLK_CTL),
- MSM_DEVICE(SPM0),
- MSM_DEVICE(SPM1),
+ MSM_CHIP_DEVICE(CSR, MSM7XXX),
+ MSM_CHIP_DEVICE(GPIO1, MSM7XXX),
+ MSM_CHIP_DEVICE(GPIO2, MSM7XXX),
+ MSM_CHIP_DEVICE(QGIC_DIST, MSM8625),
+ MSM_CHIP_DEVICE(QGIC_CPU, MSM8625),
+ MSM_CHIP_DEVICE(TMR, MSM8625),
+ MSM_CHIP_DEVICE(TMR0, MSM8625),
+ MSM_CHIP_DEVICE(SCU, MSM8625),
+ MSM_CHIP_DEVICE(CFG_CTL, MSM8625),
+ MSM_CHIP_DEVICE(CLK_CTL, MSM8625),
+ MSM_CHIP_DEVICE(SPM0, MSM8625),
+ MSM_CHIP_DEVICE(SPM1, MSM8625),
#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
defined(CONFIG_DEBUG_MSM_UART3)
- MSM_DEVICE(DEBUG_UART),
+ MSM_CHIP_DEVICE(DEBUG_UART, MSM7XXX),
#endif
#ifdef CONFIG_CACHE_L2X0
{
.virtual = (unsigned long) MSM_L2CC_BASE,
- .pfn = __phys_to_pfn(MSM_L2CC_PHYS),
- .length = MSM_L2CC_SIZE,
+ .pfn = __phys_to_pfn(MSM7XXX_L2CC_PHYS),
+ .length = MSM7XXX_L2CC_SIZE,
.type = MT_DEVICE,
},
#endif