msm: pil-q6v5-mss: Clear modem subsystem IO clamps prior to resetting Q6
Interfacing with some modem subsystem peripherals is not possible
unless the UNCLAMP_ALL bit is set in MSS_CLAMP_IO register. Set
this bit accordingly.
Change-Id: I5685383c506b0bcb89d6b6f808021512079cc607
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
diff --git a/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt b/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt
index 95e7f88..32c9c35 100644
--- a/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt
+++ b/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt
@@ -7,11 +7,12 @@
Required properties:
- compatible: Must be "qcom,pil-q6v5-mss"
-- reg: Four pairs of physical base addresses and region sizes of
+- reg: Five pairs of physical base addresses and region sizes of
memory mapped registers. The first region corresponds to
QDSP6SS_PUB, the second to the bus port halt register
- base, the third to the MSS_RELAY_MSG_BUFFER base, and the
- fourth to the MSS_RESTART register.
+ base, the third to the MSS_RELAY_MSG_BUFFER base, the
+ fourth to the MSS_RESTART register, and the fifth to the
+ MSS_CLAMP_IO register.
- vdd_mss-supply: Reference to the regulator that supplies the processor.
- qcom,firmware-name: Base name of the firmware image. Ex. "mdsp"
- qcom,pil-self-auth: <0> if the hardware does not require self-authenticating
@@ -24,7 +25,8 @@
reg = <0xfc880000 0x100>,
<0xfd485000 0x400>,
<0xfc820000 0x020>,
- <0xfc401680 0x004>;
+ <0xfc401680 0x004>,
+ <0xfc980008 0x004>;
vdd_mss-supply = <&pm8841_s3>;
qcom,firmware-name = "mba";
diff --git a/arch/arm/boot/dts/msm8974.dtsi b/arch/arm/boot/dts/msm8974.dtsi
index 446f310..1796ae6 100644
--- a/arch/arm/boot/dts/msm8974.dtsi
+++ b/arch/arm/boot/dts/msm8974.dtsi
@@ -468,7 +468,8 @@
reg = <0xfc880000 0x100>,
<0xfd485000 0x400>,
<0xfc820000 0x020>,
- <0xfc401680 0x004>;
+ <0xfc401680 0x004>,
+ <0xfc980008 0x004>;
vdd_mss-supply = <&pm8841_s3>;
qcom,firmware-name = "mba";
diff --git a/arch/arm/mach-msm/pil-q6v5-mss.c b/arch/arm/mach-msm/pil-q6v5-mss.c
index 72ea57cc..56be717 100644
--- a/arch/arm/mach-msm/pil-q6v5-mss.c
+++ b/arch/arm/mach-msm/pil-q6v5-mss.c
@@ -38,6 +38,9 @@
#define MSS_MODEM_HALT_BASE 0x200
#define MSS_NC_HALT_BASE 0x280
+/* MSS_CLAMP_IO Register Value */
+#define MSS_IO_UNCLAMP_ALL 0x40
+
/* RMB Status Register Values */
#define STATUS_PBL_SUCCESS 0x1
#define STATUS_XPU_UNLOCKED 0x1
@@ -166,6 +169,9 @@
drv->reg_base + QDSP6SS_RST_EVB);
}
+ /* De-assert MSS IO clamps */
+ writel_relaxed(MSS_IO_UNCLAMP_ALL, drv->io_clamp_reg);
+
ret = pil_q6v5_reset(pil);
if (ret)
goto err_q6v5_reset;
@@ -233,6 +239,12 @@
if (!drv->restart_reg)
return -ENOMEM;
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 4);
+ drv->io_clamp_reg = devm_ioremap(&pdev->dev, res->start,
+ resource_size(res));
+ if (!drv->io_clamp_reg)
+ return -ENOMEM;
+
drv->vreg = devm_regulator_get(&pdev->dev, "vdd_mss");
if (IS_ERR(drv->vreg))
return PTR_ERR(drv->vreg);
diff --git a/arch/arm/mach-msm/pil-q6v5.h b/arch/arm/mach-msm/pil-q6v5.h
index f94129d..6985360 100644
--- a/arch/arm/mach-msm/pil-q6v5.h
+++ b/arch/arm/mach-msm/pil-q6v5.h
@@ -28,6 +28,7 @@
void __iomem *axi_halt_base;
void __iomem *rmb_base;
void __iomem *restart_reg;
+ void __iomem *io_clamp_reg;
unsigned long start_addr;
struct regulator *vreg;
bool is_booted;