)]}'
{
  "commit": "1b4d7d75ccff38008ccd40f8e2d74e33a087caaa",
  "tree": "115c2aff76fc4805f63c511a41bbf48268ba5c08",
  "parents": [
    "8c2a6d730400e14bf28ccfa11b9bbf453db775ec"
  ],
  "author": {
    "name": "Alex Deucher",
    "email": "alexdeucher@gmail.com",
    "time": "Thu Oct 15 01:33:35 2009 -0400"
  },
  "committer": {
    "name": "Dave Airlie",
    "email": "airlied@redhat.com",
    "time": "Thu Oct 15 15:33:46 2009 +1000"
  },
  "message": "drm/radeon/kms: fix internal tmds setup on legacy display engine\n\n- crtc 0 routing was wrong\n- need to clear various timing bits in FP_GEN_CNTL\n- need to set FP_H/V2_SYNC_STRT_WID regs for crtc 1\n\nSigned-off-by: Alex Deucher \u003calexdeucher@gmail.com\u003e\nSigned-off-by: Dave Airlie \u003cairlied@redhat.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "d22a195cf152e909be43b1bc312e83af8341ae00",
      "old_mode": 33188,
      "old_path": "drivers/gpu/drm/radeon/radeon_legacy_crtc.c",
      "new_id": "8d0b7aa87fa4da95ee94415460641e974686e1b0",
      "new_mode": 33188,
      "new_path": "drivers/gpu/drm/radeon/radeon_legacy_crtc.c"
    },
    {
      "type": "modify",
      "old_id": "3a75b5b6009bd3f6a0f0fd2e11ab448a3265b3b6",
      "old_mode": 33188,
      "old_path": "drivers/gpu/drm/radeon/radeon_legacy_encoders.c",
      "new_id": "00382122869b9c94dfeeff68c1f6a4d5ec2ad821",
      "new_mode": 33188,
      "new_path": "drivers/gpu/drm/radeon/radeon_legacy_encoders.c"
    }
  ]
}