)]}'
{
  "commit": "1b5b776aa5730cbda9cba84ba0f8ccd53a775797",
  "tree": "60b661ac7cceba108dd07062a54e7fb724a19e72",
  "parents": [
    "9287d95ea194abf32fab24c6909f8ea55ab0292f"
  ],
  "author": {
    "name": "Hirokazu Takata",
    "email": "takata@linux-m32r.org",
    "time": "Fri Jan 06 00:18:42 2006 -0800"
  },
  "committer": {
    "name": "Linus Torvalds",
    "email": "torvalds@g5.osdl.org",
    "time": "Fri Jan 06 08:33:43 2006 -0800"
  },
  "message": "[PATCH] m32r: Update syscall macros for MMU-less targets\n\nThis patch is for updating m32r\u0027s MMU-less support.\n\nSome legacy MMU-less m32r chips cannot return from a trap handler to the\nright-hand side 16-bit halfword code of a 32-bit instrucion code pair, because\na \"trap\" instruction specification was expanded in M32R-II ISA.\n\nThis modification forces \"trap\" instructions to be placed in word alignment\nlocation with a parallel \"nop\" code.\n\nSigned-off-by: Kazuhiro Inaoka \u003cinaoka@linux-m32r.org\u003e\nSigned-off-by: Hirokazu Takata \u003ctakata@linux-m32r.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "ac399e1f7bc02b1d5d109185156a809c47d2c0e5",
      "old_mode": 33188,
      "old_path": "include/asm-m32r/unistd.h",
      "new_id": "39be87ca2a5a7cf7966621e11b9cf007ba6c388f",
      "new_mode": 33188,
      "new_path": "include/asm-m32r/unistd.h"
    }
  ]
}