)]}'
{
  "commit": "1ef48593bd6a508984d1270a1075532628bfd9c8",
  "tree": "4cc0cdc07616becf7f60e5fa7438c916d30f6dbe",
  "parents": [
    "6d999da4d2610460fc5f5ce498f1483b40cc6679"
  ],
  "author": {
    "name": "Will Simoneau",
    "email": "simoneau@ele.uri.edu",
    "time": "Sat Jul 16 10:45:12 2011 -0700"
  },
  "committer": {
    "name": "David S. Miller",
    "email": "davem@davemloft.net",
    "time": "Sat Jul 16 10:45:12 2011 -0700"
  },
  "message": "sparc: sun4m SMP: fix wrong shift instruction in IPI handler\n\nThis shift instruction appears to be shifting in the wrong direction.\nWithout this change, my SparcStation-20MP hangs just after bringing up\nthe second CPU:\n\nEntering SMP Mode...\nStarting CPU 2 at f02b4e90\nBrought up 2 CPUs\nTotal of 2 processors activated (99.52 BogoMIPS).\n   *** stuck ***\n\nSigned-off-by: Will Simoneau \u003csimoneau@ele.uri.edu\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "9fe08a1ea6c6ea226f9cb4a91bf1f183067d98da",
      "old_mode": 33188,
      "old_path": "arch/sparc/kernel/entry.S",
      "new_id": "f445e98463e6d332c0191f13092738dc8336677b",
      "new_mode": 33188,
      "new_path": "arch/sparc/kernel/entry.S"
    }
  ]
}