msm: clock-8974: Correct 320MHz source for the axi_clk_src
The 320 Mhz source for the axi_clk_src needs to be MMPLL0
at 800MHz and not MMPLL1 at 846MHz. Correct this.
Change-Id: I40722b1190ac15e82953c3ddd9c69402737a4313
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
diff --git a/arch/arm/mach-msm/clock-8974.c b/arch/arm/mach-msm/clock-8974.c
index 82b7fd6..38a5876 100644
--- a/arch/arm/mach-msm/clock-8974.c
+++ b/arch/arm/mach-msm/clock-8974.c
@@ -2274,7 +2274,7 @@
F_MM( 19200000, cxo, 1, 0, 0),
F_MM(150000000, gpll0, 4, 0, 0),
F_MM(282000000, mmpll1, 3, 0, 0),
- F_MM(320000000, mmpll1, 2.5, 0, 0),
+ F_MM(320000000, mmpll0, 2.5, 0, 0),
F_MM(400000000, mmpll0, 2, 0, 0),
F_END
};