)]}'
{
  "commit": "2226d263ff3f0dcd49e2f85d97e703d19044cc4c",
  "tree": "00437c0144dd176f6b0630012638efaaef5ec9a3",
  "parents": [
    "1454bc830613871a47e67cab10c14af80c2d4e61"
  ],
  "author": {
    "name": "Subhash Jadavani",
    "email": "subhashj@codeaurora.org",
    "time": "Tue Oct 09 20:01:56 2012 +0530"
  },
  "committer": {
    "name": "Neha Pandey",
    "email": "nehap@codeaurora.org",
    "time": "Mon Nov 26 16:13:15 2012 -0800"
  },
  "message": "mmc: msm_sdcc: set DDR timing mode before setting the clock rate\n\nSetting DDR timing mode in controller before setting the clock\nrate will make sure that card don\u0027t see the double clock rate\neven for very small amount duration. Some eMMC cards seems to lock\nup if they see clock frequency \u003e 52MHz.\n(cherry picked from commit 2877d919135791d5223a9ba94b2cfc9ba50bc3df)\nSigned-off-by: Subhash Jadavani \u003csubhashj@codeaurora.org\u003e\n\nChange-Id: I7a4ace461e2def6d53863db4b768ec7e497b3095\nSigned-off-by: Neha Pandey \u003cnehap@codeaurora.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "8bac4ef0db17cc99894496c1a308bbd396e4e6d7",
      "old_mode": 33188,
      "old_path": "drivers/mmc/host/msm_sdcc.c",
      "new_id": "353b4391c19cc7e0103be20a64519c0f32d0c7e1",
      "new_mode": 33188,
      "new_path": "drivers/mmc/host/msm_sdcc.c"
    }
  ]
}
