)]}'
{
  "commit": "2277ab4a1df50e05bc732fe9488d4e902bb8399a",
  "tree": "f41cb47f15e02bbd1f79bf08ef7762d3bba934f6",
  "parents": [
    "c0b96cf639aa1bfa8983f734d4225091aa813e00"
  ],
  "author": {
    "name": "Paul Mundt",
    "email": "lethal@linux-sh.org",
    "time": "Wed Jul 22 19:20:49 2009 +0900"
  },
  "committer": {
    "name": "Paul Mundt",
    "email": "lethal@linux-sh.org",
    "time": "Wed Jul 22 19:20:49 2009 +0900"
  },
  "message": "sh: Migrate from PG_mapped to PG_dcache_dirty.\n\nThis inverts the delayed dcache flush a bit to be more in line with other\nplatforms. At the same time this also gives us the ability to do some\nmore optimizations and cleanup. Now that the update_mmu_cache() callsite\nonly tests for the bit, the implementation can gradually be split out and\nmade generic, rather than relying on special implementations for each of\nthe peculiar CPU types.\n\nSH7705 in 32kB mode and SH-4 still need slightly different handling, but\nthis is something that can remain isolated in the varying page copy/clear\nroutines. On top of that, SH-X3 is dcache coherent, so there is no need\nto bother with any of these tests in the PTEAEX version of\nupdate_mmu_cache(), so we kill that off too.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n",
  "tree_diff": [
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      "new_path": "arch/sh/include/asm/page.h"
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