|  | /* | 
|  | * Device Tree Source for AMCC Redwood(460SX) | 
|  | * | 
|  | * Copyright 2008 AMCC <tmarri@amcc.com> | 
|  | * | 
|  | * This file is licensed under the terms of the GNU General Public | 
|  | * License version 2.  This program is licensed "as is" without | 
|  | * any warranty of any kind, whether express or implied. | 
|  | */ | 
|  |  | 
|  | /dts-v1/; | 
|  |  | 
|  | / { | 
|  | #address-cells = <2>; | 
|  | #size-cells = <1>; | 
|  | model = "amcc,redwood"; | 
|  | compatible = "amcc,redwood"; | 
|  | dcr-parent = <&{/cpus/cpu@0}>; | 
|  |  | 
|  | aliases { | 
|  | ethernet0 = &EMAC0; | 
|  | serial0 = &UART0; | 
|  | }; | 
|  |  | 
|  | cpus { | 
|  | #address-cells = <1>; | 
|  | #size-cells = <0>; | 
|  |  | 
|  | cpu@0 { | 
|  | device_type = "cpu"; | 
|  | model = "PowerPC,460SX"; | 
|  | reg = <0x00000000>; | 
|  | clock-frequency = <0>; /* Filled in by U-Boot */ | 
|  | timebase-frequency = <0>; /* Filled in by U-Boot */ | 
|  | i-cache-line-size = <32>; | 
|  | d-cache-line-size = <32>; | 
|  | i-cache-size = <32768>; | 
|  | d-cache-size = <32768>; | 
|  | dcr-controller; | 
|  | dcr-access-method = "native"; | 
|  | }; | 
|  | }; | 
|  |  | 
|  | memory { | 
|  | device_type = "memory"; | 
|  | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ | 
|  | }; | 
|  |  | 
|  | UIC0: interrupt-controller0 { | 
|  | compatible = "ibm,uic-460sx","ibm,uic"; | 
|  | interrupt-controller; | 
|  | cell-index = <0>; | 
|  | dcr-reg = <0x0c0 0x009>; | 
|  | #address-cells = <0>; | 
|  | #size-cells = <0>; | 
|  | #interrupt-cells = <2>; | 
|  | }; | 
|  |  | 
|  | UIC1: interrupt-controller1 { | 
|  | compatible = "ibm,uic-460sx","ibm,uic"; | 
|  | interrupt-controller; | 
|  | cell-index = <1>; | 
|  | dcr-reg = <0x0d0 0x009>; | 
|  | #address-cells = <0>; | 
|  | #size-cells = <0>; | 
|  | #interrupt-cells = <2>; | 
|  | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ | 
|  | interrupt-parent = <&UIC0>; | 
|  | }; | 
|  |  | 
|  | UIC2: interrupt-controller2 { | 
|  | compatible = "ibm,uic-460sx","ibm,uic"; | 
|  | interrupt-controller; | 
|  | cell-index = <2>; | 
|  | dcr-reg = <0x0e0 0x009>; | 
|  | #address-cells = <0>; | 
|  | #size-cells = <0>; | 
|  | #interrupt-cells = <2>; | 
|  | interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ | 
|  | interrupt-parent = <&UIC0>; | 
|  | }; | 
|  |  | 
|  | UIC3: interrupt-controller3 { | 
|  | compatible = "ibm,uic-460sx","ibm,uic"; | 
|  | interrupt-controller; | 
|  | cell-index = <3>; | 
|  | dcr-reg = <0x0f0 0x009>; | 
|  | #address-cells = <0>; | 
|  | #size-cells = <0>; | 
|  | #interrupt-cells = <2>; | 
|  | interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ | 
|  | interrupt-parent = <&UIC0>; | 
|  | }; | 
|  |  | 
|  | SDR0: sdr { | 
|  | compatible = "ibm,sdr-460sx"; | 
|  | dcr-reg = <0x00e 0x002>; | 
|  | }; | 
|  |  | 
|  | CPR0: cpr { | 
|  | compatible = "ibm,cpr-460sx"; | 
|  | dcr-reg = <0x00c 0x002>; | 
|  | }; | 
|  |  | 
|  | plb { | 
|  | compatible = "ibm,plb-460sx", "ibm,plb4"; | 
|  | #address-cells = <2>; | 
|  | #size-cells = <1>; | 
|  | ranges; | 
|  | clock-frequency = <0>; /* Filled in by U-Boot */ | 
|  |  | 
|  | SDRAM0: sdram { | 
|  | compatible = "ibm,sdram-460sx", "ibm,sdram-405gp"; | 
|  | dcr-reg = <0x010 0x002>; | 
|  | }; | 
|  |  | 
|  | MAL0: mcmal { | 
|  | compatible = "ibm,mcmal-460sx", "ibm,mcmal2"; | 
|  | dcr-reg = <0x180 0x62>; | 
|  | num-tx-chans = <4>; | 
|  | num-rx-chans = <32>; | 
|  | #address-cells = <1>; | 
|  | #size-cells = <1>; | 
|  | interrupt-parent = <&UIC1>; | 
|  | interrupts = <	/*TXEOB*/ 0x6 0x4 | 
|  | /*RXEOB*/ 0x7 0x4 | 
|  | /*SERR*/  0x1 0x4 | 
|  | /*TXDE*/  0x2 0x4 | 
|  | /*RXDE*/  0x3 0x4 | 
|  | /*COAL TX0*/ 0x18 0x2 | 
|  | /*COAL TX1*/ 0x19 0x2 | 
|  | /*COAL TX2*/ 0x1a 0x2 | 
|  | /*COAL TX3*/ 0x1b 0x2 | 
|  | /*COAL RX0*/ 0x1c 0x2 | 
|  | /*COAL RX1*/ 0x1d 0x2 | 
|  | /*COAL RX2*/ 0x1e 0x2 | 
|  | /*COAL RX3*/ 0x1f 0x2>; | 
|  | }; | 
|  |  | 
|  | POB0: opb { | 
|  | compatible = "ibm,opb-460sx", "ibm,opb"; | 
|  | #address-cells = <1>; | 
|  | #size-cells = <1>; | 
|  | ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; | 
|  | clock-frequency = <0>; /* Filled in by U-Boot */ | 
|  |  | 
|  | EBC0: ebc { | 
|  | compatible = "ibm,ebc-460sx", "ibm,ebc"; | 
|  | dcr-reg = <0x012 0x002>; | 
|  | #address-cells = <2>; | 
|  | #size-cells = <1>; | 
|  | clock-frequency = <0>; /* Filled in by U-Boot */ | 
|  | /* ranges property is supplied by U-Boot */ | 
|  | interrupts = <0x6 0x4>; | 
|  | interrupt-parent = <&UIC1>; | 
|  |  | 
|  | nor_flash@0,0 { | 
|  | compatible = "amd,s29gl512n", "cfi-flash"; | 
|  | bank-width = <2>; | 
|  | reg = <0x0000000 0x00000000 0x04000000>; | 
|  | #address-cells = <1>; | 
|  | #size-cells = <1>; | 
|  | partition@0 { | 
|  | label = "kernel"; | 
|  | reg = <0x00000000 0x001e0000>; | 
|  | }; | 
|  | partition@1e0000 { | 
|  | label = "dtb"; | 
|  | reg = <0x001e0000 0x00020000>; | 
|  | }; | 
|  | partition@200000 { | 
|  | label = "ramdisk"; | 
|  | reg = <0x00200000 0x01400000>; | 
|  | }; | 
|  | partition@1600000 { | 
|  | label = "jffs2"; | 
|  | reg = <0x01600000 0x00400000>; | 
|  | }; | 
|  | partition@1a00000 { | 
|  | label = "user"; | 
|  | reg = <0x01a00000 0x02560000>; | 
|  | }; | 
|  | partition@3f60000 { | 
|  | label = "env"; | 
|  | reg = <0x03f60000 0x00040000>; | 
|  | }; | 
|  | partition@3fa0000 { | 
|  | label = "u-boot"; | 
|  | reg = <0x03fa0000 0x00060000>; | 
|  | }; | 
|  | }; | 
|  | }; | 
|  |  | 
|  | UART0: serial@ef600200 { | 
|  | device_type = "serial"; | 
|  | compatible = "ns16550"; | 
|  | reg = <0xef600200 0x00000008>; | 
|  | virtual-reg = <0xef600200>; | 
|  | clock-frequency = <0>; /* Filled in by U-Boot */ | 
|  | current-speed = <0>; /* Filled in by U-Boot */ | 
|  | interrupt-parent = <&UIC0>; | 
|  | interrupts = <0x0 0x4>; | 
|  | }; | 
|  |  | 
|  | RGMII0: emac-rgmii@ef600900 { | 
|  | compatible = "ibm,rgmii-460sx", "ibm,rgmii"; | 
|  | reg = <0xef600900 0x00000008>; | 
|  | }; | 
|  |  | 
|  | EMAC0: ethernet@ef600a00 { | 
|  | device_type = "network"; | 
|  | compatible = "ibm,emac-460sx", "ibm,emac4"; | 
|  | interrupt-parent = <&EMAC0>; | 
|  | interrupts = <0x0 0x1>; | 
|  | #interrupt-cells = <1>; | 
|  | #address-cells = <0>; | 
|  | #size-cells = <0>; | 
|  | interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4 | 
|  | /*Wake*/   0x1 &UIC2 0x1d 0x4>; | 
|  | reg = <0xef600a00 0x00000070>; | 
|  | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 
|  | mal-device = <&MAL0>; | 
|  | mal-tx-channel = <0>; | 
|  | mal-rx-channel = <0>; | 
|  | cell-index = <0>; | 
|  | max-frame-size = <9000>; | 
|  | rx-fifo-size = <4096>; | 
|  | tx-fifo-size = <2048>; | 
|  | rx-fifo-size-gige = <16384>; | 
|  | phy-mode = "rgmii"; | 
|  | phy-map = <0x00000000>; | 
|  | rgmii-device = <&RGMII0>; | 
|  | rgmii-channel = <0>; | 
|  | has-inverted-stacr-oc; | 
|  | has-new-stacr-staopc; | 
|  | }; | 
|  | }; | 
|  | PCIE0: pciex@d00000000 { | 
|  | device_type = "pci"; | 
|  | #interrupt-cells = <1>; | 
|  | #size-cells = <2>; | 
|  | #address-cells = <3>; | 
|  | compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; | 
|  | primary; | 
|  | port = <0x0>; /* port number */ | 
|  | reg = <0x0000000d 0x00000000 0x20000000	/* Config space access */ | 
|  | 0x0000000c 0x10000000 0x00001000>;	/* Registers */ | 
|  | dcr-reg = <0x100 0x020>; | 
|  | sdr-base = <0x300>; | 
|  |  | 
|  | /* Outbound ranges, one memory and one IO, | 
|  | * later cannot be changed | 
|  | */ | 
|  | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 | 
|  | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; | 
|  |  | 
|  | /* Inbound 2GB range starting at 0 */ | 
|  | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; | 
|  |  | 
|  | /* This drives busses 10 to 0x1f */ | 
|  | bus-range = <0x10 0x1f>; | 
|  |  | 
|  | /* Legacy interrupts (note the weird polarity, the bridge seems | 
|  | * to invert PCIe legacy interrupts). | 
|  | * We are de-swizzling here because the numbers are actually for | 
|  | * port of the root complex virtual P2P bridge. But I want | 
|  | * to avoid putting a node for it in the tree, so the numbers | 
|  | * below are basically de-swizzled numbers. | 
|  | * The real slot is on idsel 0, so the swizzling is 1:1 | 
|  | */ | 
|  | interrupt-map-mask = <0x0 0x0 0x0 0x7>; | 
|  | interrupt-map = < | 
|  | 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ | 
|  | 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ | 
|  | 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ | 
|  | 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; | 
|  | }; | 
|  |  | 
|  | PCIE1: pciex@d20000000 { | 
|  | device_type = "pci"; | 
|  | #interrupt-cells = <1>; | 
|  | #size-cells = <2>; | 
|  | #address-cells = <3>; | 
|  | compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; | 
|  | primary; | 
|  | port = <0x1>; /* port number */ | 
|  | reg = <0x0000000d 0x20000000 0x20000000	/* Config space access */ | 
|  | 0x0000000c 0x10001000 0x00001000>;	/* Registers */ | 
|  | dcr-reg = <0x120 0x020>; | 
|  | sdr-base = <0x340>; | 
|  |  | 
|  | /* Outbound ranges, one memory and one IO, | 
|  | * later cannot be changed | 
|  | */ | 
|  | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 | 
|  | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; | 
|  |  | 
|  | /* Inbound 2GB range starting at 0 */ | 
|  | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; | 
|  |  | 
|  | /* This drives busses 10 to 0x1f */ | 
|  | bus-range = <0x20 0x2f>; | 
|  |  | 
|  | /* Legacy interrupts (note the weird polarity, the bridge seems | 
|  | * to invert PCIe legacy interrupts). | 
|  | * We are de-swizzling here because the numbers are actually for | 
|  | * port of the root complex virtual P2P bridge. But I want | 
|  | * to avoid putting a node for it in the tree, so the numbers | 
|  | * below are basically de-swizzled numbers. | 
|  | * The real slot is on idsel 0, so the swizzling is 1:1 | 
|  | */ | 
|  | interrupt-map-mask = <0x0 0x0 0x0 0x7>; | 
|  | interrupt-map = < | 
|  | 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ | 
|  | 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ | 
|  | 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ | 
|  | 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; | 
|  | }; | 
|  |  | 
|  | PCIE2: pciex@d40000000 { | 
|  | device_type = "pci"; | 
|  | #interrupt-cells = <1>; | 
|  | #size-cells = <2>; | 
|  | #address-cells = <3>; | 
|  | compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; | 
|  | primary; | 
|  | port = <0x2>; /* port number */ | 
|  | reg = <0x0000000d 0x40000000 0x20000000	/* Config space access */ | 
|  | 0x0000000c 0x10002000 0x00001000>;	/* Registers */ | 
|  | dcr-reg = <0x140 0x020>; | 
|  | sdr-base = <0x370>; | 
|  |  | 
|  | /* Outbound ranges, one memory and one IO, | 
|  | * later cannot be changed | 
|  | */ | 
|  | ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000 | 
|  | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>; | 
|  |  | 
|  | /* Inbound 2GB range starting at 0 */ | 
|  | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; | 
|  |  | 
|  | /* This drives busses 10 to 0x1f */ | 
|  | bus-range = <0x30 0x3f>; | 
|  |  | 
|  | /* Legacy interrupts (note the weird polarity, the bridge seems | 
|  | * to invert PCIe legacy interrupts). | 
|  | * We are de-swizzling here because the numbers are actually for | 
|  | * port of the root complex virtual P2P bridge. But I want | 
|  | * to avoid putting a node for it in the tree, so the numbers | 
|  | * below are basically de-swizzled numbers. | 
|  | * The real slot is on idsel 0, so the swizzling is 1:1 | 
|  | */ | 
|  | interrupt-map-mask = <0x0 0x0 0x0 0x7>; | 
|  | interrupt-map = < | 
|  | 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */ | 
|  | 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */ | 
|  | 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */ | 
|  | 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>; | 
|  | }; | 
|  |  | 
|  | MSI: ppc4xx-msi@400300000 { | 
|  | compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; | 
|  | reg = < 0x4 0x00300000 0x100 | 
|  | 0x4 0x00300000 0x100>; | 
|  | sdr-base = <0x3B0>; | 
|  | msi-data = <0x00000000>; | 
|  | msi-mask = <0x44440000>; | 
|  | interrupt-count = <3>; | 
|  | interrupts =<0 1 2 3>; | 
|  | interrupt-parent = <&UIC0>; | 
|  | #interrupt-cells = <1>; | 
|  | #address-cells = <0>; | 
|  | #size-cells = <0>; | 
|  | interrupt-map = <0 &UIC0 0xC 1 | 
|  | 1 &UIC0 0x0D 1 | 
|  | 2 &UIC0 0x0E 1 | 
|  | 3 &UIC0 0x0F 1>; | 
|  | }; | 
|  |  | 
|  | }; | 
|  |  | 
|  |  | 
|  | chosen { | 
|  | linux,stdout-path = "/plb/opb/serial@ef600200"; | 
|  | }; | 
|  |  | 
|  | }; |