| commit | 234fcd1484a66158b561b36b421547f0ab85fee9 | [log] [tgz] |
|---|---|---|
| author | Ralf Baechle <ralf@linux-mips.org> | Sat Mar 08 09:56:28 2008 +0000 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Wed Mar 12 14:14:41 2008 +0000 |
| tree | b63fbb134fd673e1713f0462e6e0642b418da616 | |
| parent | 1af0eea21431bed5d07dffc0fefab57fd72f7e90 [diff] [blame] |
[MIPS] Fix loads of section missmatches Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index f02ce63..b50e0fc 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c
@@ -146,7 +146,7 @@ } } -unsigned int __init get_c0_compare_int(void) +unsigned int __cpuinit get_c0_compare_int(void) { #ifdef MSC01E_INT_BASE if (cpu_has_veic) {