)]}'
{
  "commit": "24b647a042b988b017e6cdf60b47a0bfecd1dc41",
  "tree": "0499bc3b21be6ebe0e5809effbc4d4f09a0dc424",
  "parents": [
    "c30c2f99e10b6a810dae9a25b35c6d48796d8ffb"
  ],
  "author": {
    "name": "Catalin Marinas",
    "email": "catalin.marinas@arm.com",
    "time": "Thu Nov 06 13:23:08 2008 +0000"
  },
  "committer": {
    "name": "Catalin Marinas",
    "email": "catalin.marinas@arm.com",
    "time": "Thu Nov 06 13:23:08 2008 +0000"
  },
  "message": "ARMv7: Branch over conditional undefined instructions in vfphw.S\n\nOn ARMv7, conditional undefined instructions may generate exceptions\neven if the condition is not met. The vfphw.S contains the FPINST and\nFPINST2 access instructions which may not be present on processors with\nsynchronous VFP exceptions.\n\nSigned-off-by: Catalin Marinas \u003ccatalin.marinas@arm.com\u003e\n\n\n\n\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "a62dcf7098bad660ee65c22cbcf76a0a24677c05",
      "old_mode": 33188,
      "old_path": "arch/arm/vfp/vfphw.S",
      "new_id": "3c73aafe3e0174bdd07f6e65cdcb16cfb52b4276",
      "new_mode": 33188,
      "new_path": "arch/arm/vfp/vfphw.S"
    }
  ]
}