msm: platsmp: Support the full boot chain for 8974
With the full boot chain, the secondary CPUs are held in
reset until the primary CPU explicitly releases them from
reset.
Change-Id: Ie2a9f235386133d570dc826fe1cf5b44587a0706
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 2749098..28b7748 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -120,6 +120,29 @@
return 0;
}
+static int __cpuinit krait_release_secondary_p3(unsigned long base, int cpu)
+{
+ void *base_ptr = ioremap_nocache(base + (cpu * 0x10000), SZ_4K);
+ if (!base_ptr)
+ return -ENODEV;
+
+ writel_relaxed(0x021, base_ptr+0x04);
+ mb();
+ udelay(2);
+
+ writel_relaxed(0x020, base_ptr+0x04);
+ mb();
+ udelay(2);
+
+ writel_relaxed(0x000, base_ptr+0x04);
+ mb();
+
+ writel_relaxed(0x080, base_ptr+0x04);
+ mb();
+ iounmap(base_ptr);
+ return 0;
+}
+
static int __cpuinit release_secondary(unsigned int cpu)
{
BUG_ON(cpu >= get_core_count());
@@ -134,6 +157,9 @@
cpu_is_apq8064() || cpu_is_msm8627() || cpu_is_msm8960ab())
return krait_release_secondary(0x02088000, cpu);
+ if (cpu_is_msm8974())
+ return krait_release_secondary_p3(0xf9088000, cpu);
+
WARN(1, "unknown CPU case in release_secondary\n");
return -EINVAL;
}