Blackfin arch: Extend sram malloc to handle L2 SRAM.
Extend system call to alloc L2 SRAM in application.
Automatically move following sections to L2 SRAM:
1. kernel built-in l2 attribute section
2. kernel module l2 attribute section
3. elf-fdpic application l2 attribute section
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
diff --git a/arch/blackfin/kernel/module.c b/arch/blackfin/kernel/module.c
index 14a4284..e1bebc8 100644
--- a/arch/blackfin/kernel/module.c
+++ b/arch/blackfin/kernel/module.c
@@ -173,7 +173,7 @@
for (s = sechdrs; s < sechdrs_end; ++s) {
if ((strcmp(".l1.text", secstrings + s->sh_name) == 0) ||
((strcmp(".text", secstrings + s->sh_name) == 0) &&
- (hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) {
+ (hdr->e_flags & EF_BFIN_CODE_IN_L1) && (s->sh_size > 0))) {
dest = l1_inst_sram_alloc(s->sh_size);
mod->arch.text_l1 = dest;
if (dest == NULL) {
@@ -188,7 +188,7 @@
}
if ((strcmp(".l1.data", secstrings + s->sh_name) == 0) ||
((strcmp(".data", secstrings + s->sh_name) == 0) &&
- (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
+ (hdr->e_flags & EF_BFIN_DATA_IN_L1) && (s->sh_size > 0))) {
dest = l1_data_sram_alloc(s->sh_size);
mod->arch.data_a_l1 = dest;
if (dest == NULL) {
@@ -203,7 +203,7 @@
}
if (strcmp(".l1.bss", secstrings + s->sh_name) == 0 ||
((strcmp(".bss", secstrings + s->sh_name) == 0) &&
- (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
+ (hdr->e_flags & EF_BFIN_DATA_IN_L1) && (s->sh_size > 0))) {
dest = l1_data_sram_alloc(s->sh_size);
mod->arch.bss_a_l1 = dest;
if (dest == NULL) {
@@ -242,6 +242,51 @@
s->sh_flags &= ~SHF_ALLOC;
s->sh_addr = (unsigned long)dest;
}
+ if ((strcmp(".l2.text", secstrings + s->sh_name) == 0) ||
+ ((strcmp(".text", secstrings + s->sh_name) == 0) &&
+ (hdr->e_flags & EF_BFIN_CODE_IN_L2) && (s->sh_size > 0))) {
+ dest = l2_sram_alloc(s->sh_size);
+ mod->arch.text_l2 = dest;
+ if (dest == NULL) {
+ printk(KERN_ERR
+ "module %s: L2 SRAM allocation failed\n",
+ mod->name);
+ return -1;
+ }
+ memcpy(dest, (void *)s->sh_addr, s->sh_size);
+ s->sh_flags &= ~SHF_ALLOC;
+ s->sh_addr = (unsigned long)dest;
+ }
+ if ((strcmp(".l2.data", secstrings + s->sh_name) == 0) ||
+ ((strcmp(".data", secstrings + s->sh_name) == 0) &&
+ (hdr->e_flags & EF_BFIN_DATA_IN_L2) && (s->sh_size > 0))) {
+ dest = l2_sram_alloc(s->sh_size);
+ mod->arch.data_l2 = dest;
+ if (dest == NULL) {
+ printk(KERN_ERR
+ "module %s: L2 SRAM allocation failed\n",
+ mod->name);
+ return -1;
+ }
+ memcpy(dest, (void *)s->sh_addr, s->sh_size);
+ s->sh_flags &= ~SHF_ALLOC;
+ s->sh_addr = (unsigned long)dest;
+ }
+ if (strcmp(".l2.bss", secstrings + s->sh_name) == 0 ||
+ ((strcmp(".bss", secstrings + s->sh_name) == 0) &&
+ (hdr->e_flags & EF_BFIN_DATA_IN_L2) && (s->sh_size > 0))) {
+ dest = l2_sram_alloc(s->sh_size);
+ mod->arch.bss_l2 = dest;
+ if (dest == NULL) {
+ printk(KERN_ERR
+ "module %s: L2 SRAM allocation failed\n",
+ mod->name);
+ return -1;
+ }
+ memset(dest, 0, s->sh_size);
+ s->sh_flags &= ~SHF_ALLOC;
+ s->sh_addr = (unsigned long)dest;
+ }
}
return 0;
}
@@ -411,9 +456,10 @@
continue;
if ((sechdrs[i].sh_type == SHT_RELA) &&
- ((strcmp(".rela.l1.text", secstrings + sechdrs[i].sh_name) == 0) ||
+ ((strcmp(".rela.l2.text", secstrings + sechdrs[i].sh_name) == 0) ||
+ (strcmp(".rela.l1.text", secstrings + sechdrs[i].sh_name) == 0) ||
((strcmp(".rela.text", secstrings + sechdrs[i].sh_name) == 0) &&
- (hdr->e_flags & FLG_CODE_IN_L1)))) {
+ (hdr->e_flags & (EF_BFIN_CODE_IN_L1|EF_BFIN_CODE_IN_L2))))) {
apply_relocate_add((Elf_Shdr *) sechdrs, strtab,
symindex, i, mod);
}
@@ -423,14 +469,12 @@
void module_arch_cleanup(struct module *mod)
{
- if (mod->arch.text_l1)
- l1_inst_sram_free((void *)mod->arch.text_l1);
- if (mod->arch.data_a_l1)
- l1_data_sram_free((void *)mod->arch.data_a_l1);
- if (mod->arch.bss_a_l1)
- l1_data_sram_free((void *)mod->arch.bss_a_l1);
- if (mod->arch.data_b_l1)
- l1_data_B_sram_free((void *)mod->arch.data_b_l1);
- if (mod->arch.bss_b_l1)
- l1_data_B_sram_free((void *)mod->arch.bss_b_l1);
+ l1_inst_sram_free(mod->arch.text_l1);
+ l1_data_A_sram_free(mod->arch.data_a_l1);
+ l1_data_A_sram_free(mod->arch.bss_a_l1);
+ l1_data_B_sram_free(mod->arch.data_b_l1);
+ l1_data_B_sram_free(mod->arch.bss_b_l1);
+ l2_sram_free(mod->arch.text_l2);
+ l2_sram_free(mod->arch.data_l2);
+ l2_sram_free(mod->arch.bss_l2);
}
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index 861a1db..8671d1d 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -104,6 +104,7 @@
unsigned long l1_code_length;
unsigned long l1_data_a_length;
unsigned long l1_data_b_length;
+ unsigned long l2_length;
l1_code_length = _etext_l1 - _stext_l1;
if (l1_code_length > L1_CODE_LENGTH)
@@ -129,6 +130,15 @@
/* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */
dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
l1_data_a_length, l1_data_b_length);
+
+#ifdef L2_LENGTH
+ l2_length = _ebss_l2 - _stext_l2;
+ if (l2_length > L2_LENGTH)
+ panic("L2 SRAM Overflow\n");
+
+ /* Copy _stext_l2 to _edata_l2 to L2 SRAM */
+ dma_memcpy(_stext_l2, _l2_lma_start, l2_length);
+#endif
}
/* add_memory_region to memmap */
diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S
index 3ecc64c..0896e38 100644
--- a/arch/blackfin/kernel/vmlinux.lds.S
+++ b/arch/blackfin/kernel/vmlinux.lds.S
@@ -101,6 +101,11 @@
#if !L1_DATA_B_LENGTH
*(.l1.data.B)
#endif
+#ifndef L2_LENGTH
+ . = ALIGN(32);
+ *(.data_l2.cacheline_aligned)
+ *(.l2.data)
+#endif
DATA_DATA
*(.data.*)
@@ -182,14 +187,13 @@
*(.l1.data)
__edata_l1 = .;
- . = ALIGN(4);
- __sbss_l1 = .;
- *(.l1.bss)
-
. = ALIGN(32);
*(.data_l1.cacheline_aligned)
. = ALIGN(4);
+ __sbss_l1 = .;
+ *(.l1.bss)
+ . = ALIGN(4);
__ebss_l1 = .;
}
@@ -203,11 +207,37 @@
. = ALIGN(4);
__sbss_b_l1 = .;
*(.l1.bss.B)
-
. = ALIGN(4);
__ebss_b_l1 = .;
}
+#ifdef L2_LENGTH
+ __l2_lma_start = .;
+
+ .text_data_l2 L2_START : AT(LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1))
+ {
+ . = ALIGN(4);
+ __stext_l2 = .;
+ *(.l1.text)
+ . = ALIGN(4);
+ __etext_l2 = .;
+
+ . = ALIGN(4);
+ __sdata_l2 = .;
+ *(.l1.data)
+ __edata_l2 = .;
+
+ . = ALIGN(32);
+ *(.data_l2.cacheline_aligned)
+
+ . = ALIGN(4);
+ __sbss_l2 = .;
+ *(.l1.bss)
+ . = ALIGN(4);
+ __ebss_l2 = .;
+ }
+#endif
+
/* Force trailing alignment of our init section so that when we
* free our init memory, we don't leave behind a partial page.
*/