)]}'
{
  "commit": "27c1cbd06a7620b354cbb363834f3bb8df4f410d",
  "tree": "0c65a9e811897758f568b73ee0466b1f5fa66f19",
  "parents": [
    "6a562e3daee217ce99fe0e31150acd89a5b22606"
  ],
  "author": {
    "name": "Chris Wilson",
    "email": "chris@chris-wilson.co.uk",
    "time": "Mon Apr 09 13:59:46 2012 +0100"
  },
  "committer": {
    "name": "Daniel Vetter",
    "email": "daniel.vetter@ffwll.ch",
    "time": "Wed Apr 11 12:14:24 2012 +0200"
  },
  "message": "drm/i915/ringbuffer: Exclude last 2 cachlines of ring on 845g\n\nThe 845g shares the errata with i830 whereby executing a command\nwithin 2 cachelines of the end of the ringbuffer may cause a GPU hang.\n\nSigned-off-by: Chris Wilson \u003cchris@chris-wilson.co.uk\u003e\nCc: stable@kernel.org\nSigned-off-by: Daniel Vetter \u003cdaniel.vetter@ffwll.ch\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "e25581a9f60f3d80ea3cbd60ab282373da7bfe8b",
      "old_mode": 33188,
      "old_path": "drivers/gpu/drm/i915/intel_ringbuffer.c",
      "new_id": "f75806e5bff5c62273ddaee7d5f94bd15cb860e8",
      "new_mode": 33188,
      "new_path": "drivers/gpu/drm/i915/intel_ringbuffer.c"
    }
  ]
}