msm: 8064: Enable crypto engine.
-add new clock - ce3_core_src_clk to 8064 target.
-ce3_p_clk and ce3_core_clk are derived from ce3_core_src_clk.
-ce3 core src clock expects that the driver(qce40) set the clock
rate before the clock is enabled.
-set ce3_core_src_clk rate to 100mhz.
-add new DMA channels for APQ8064.
Change-Id: I3f0897b43d5d58a60a1df4f61a241868b8b9a926
Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org>
diff --git a/arch/arm/mach-msm/devices-8064.c b/arch/arm/mach-msm/devices-8064.c
index 9b8d5ac..afc2649 100644
--- a/arch/arm/mach-msm/devices-8064.c
+++ b/arch/arm/mach-msm/devices-8064.c
@@ -761,6 +761,12 @@
CLK_DUMMY("dfab_clk", DFAB_CLK, NULL, 0),
CLK_DUMMY("dma_bam_pclk", DMA_BAM_P_CLK, NULL, 0),
CLK_DUMMY("mem_clk", EBI1_ADM_CLK, "msm_dmov", 0),
+ CLK_DUMMY("ce3_core_src_clk", CE3_SRC_CLK, "qce.0", OFF),
+ CLK_DUMMY("ce3_core_src_clk", CE3_SRC_CLK, "qcrypto.0", OFF),
+ CLK_DUMMY("core_clk", CE3_CORE_CLK, "qce.0", OFF),
+ CLK_DUMMY("core_clk", CE3_CORE_CLK, "qcrypto.0", OFF),
+ CLK_DUMMY("iface_clk", CE3_P_CLK, "qce0.0", OFF),
+ CLK_DUMMY("iface_clk", CE3_P_CLK, "qcrypto.0", OFF),
};
struct clock_init_data apq8064_dummy_clock_init_data __initdata = {