)]}'
{
  "commit": "29bdc88384c2b24e37e5760df0dc898546083d6b",
  "tree": "9d8fe16ac4728ab669f81a763effda21301d9ddf",
  "parents": [
    "c9257433f2eaf8803a1f3d3be5d984232db41ffe"
  ],
  "author": {
    "name": "Vladimir Sokolovsky",
    "email": "vlad@mellanox.co.il",
    "time": "Mon Sep 15 14:25:23 2008 -0700"
  },
  "committer": {
    "name": "Roland Dreier",
    "email": "rolandd@cisco.com",
    "time": "Mon Sep 15 14:25:23 2008 -0700"
  },
  "message": "IB/mlx4: Fix up fast register page list format\n\nByte swap the addresses in the page list for fast register work requests\nto big endian to match what the HCA expectx.  Also, the addresses must\nhave the \"present\" bit set so that the HCA knows it can access them.\nOtherwise the HCA will fault the first time it accesses the memory\nregion.\n\nSigned-off-by: Vladimir Sokolovsky \u003cvlad@mellanox.co.il\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "f29dbb767e87c3c0f77b5f23c8c58de06e85c169",
      "old_mode": 33188,
      "old_path": "drivers/infiniband/hw/mlx4/qp.c",
      "new_id": "9559248f265b80090aeecd8c693059e9e43bdad0",
      "new_mode": 33188,
      "new_path": "drivers/infiniband/hw/mlx4/qp.c"
    },
    {
      "type": "modify",
      "old_id": "644adf074a358ede1cfe263d75fc19972428a6b5",
      "old_mode": 33188,
      "old_path": "drivers/net/mlx4/mr.c",
      "new_id": "d1dd5b48dbd1412bddf6321ebd3cceb89d18bacd",
      "new_mode": 33188,
      "new_path": "drivers/net/mlx4/mr.c"
    },
    {
      "type": "modify",
      "old_id": "655ea0d1ee1474d11a1dbd23c51bf5ef8f679fda",
      "old_mode": 33188,
      "old_path": "include/linux/mlx4/device.h",
      "new_id": "b2f944468313bb296bbdf83d7ff574615a588b1b",
      "new_mode": 33188,
      "new_path": "include/linux/mlx4/device.h"
    }
  ]
}