msm: AVS: Refactor and clean up avs_hw.S to avs.c
Refactor AVS API to a cleaner C implementation. The new implementation
uses C assembly functions and provides a cleaner way for future targets
to add new AVS functionality.
Also fixed a possible issue with the earlier AVS_ENABLE and AVS_DISABLE
implementations. The earlier implementation did a get_cpu() and compared
it against the cpu for which AVS was to to be disabled, if the cpu's did
not match then it did not return an error and avs could have been left
enabled during the voltage change. In this new implementation, enable
and disable use smp_call_function_single() to ensure that the enable and
disable indeed happen on the core requested.
If acpuclock_set_rate() was called on the right core correctly during
cpufreq frequency change, there would have been no issue, but newer
implementation of mach-msm/cpufreq.c does not gaurantee that.
Change-Id: I94db3fc70341ceb79d747d54c7f525056b377755
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>
(cherry picked from commit 5e6141182f2a3638aaa04ed399643c013e414a65)
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 4ce7a02..a0732c1 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -49,7 +49,7 @@
endif
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
-obj-$(CONFIG_MSM_AVS_HW) += avs_hw.o
+obj-$(CONFIG_MSM_AVS_HW) += avs.o
obj-$(CONFIG_CPU_V6) += idle-v6.o
obj-$(CONFIG_CPU_V7) += idle-v7.o
obj-$(CONFIG_MSM_JTAG) += jtag.o
diff --git a/arch/arm/mach-msm/avs.c b/arch/arm/mach-msm/avs.c
new file mode 100644
index 0000000..aa257ef
--- /dev/null
+++ b/arch/arm/mach-msm/avs.c
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <asm/mach-types.h>
+#include <asm/cputype.h>
+#include "avs.h"
+
+u32 avs_get_avscsr(void)
+{
+ u32 val = 0;
+
+ asm volatile ("mrc p15, 7, %[avscsr], c15, c1, 7\n\t"
+ : [avscsr]"=r" (val)
+ );
+
+ return val;
+}
+EXPORT_SYMBOL(avs_get_avscsr);
+
+void avs_set_avscsr(u32 avscsr)
+{
+ asm volatile ("mcr p15, 7, %[avscsr], c15, c1, 7\n\t"
+ "isb\n\t"
+ :
+ : [avscsr]"r" (avscsr)
+ );
+}
+EXPORT_SYMBOL(avs_set_avscsr);
+
+u32 avs_get_avsdscr(void)
+{
+ u32 val = 0;
+
+ asm volatile ("mrc p15, 7, %[avsdscr], c15, c0, 6\n\t"
+ : [avsdscr]"=r" (val)
+ );
+
+ return val;
+}
+EXPORT_SYMBOL(avs_get_avsdscr);
+
+void avs_set_avsdscr(u32 avsdscr)
+{
+ asm volatile("mcr p15, 7, %[avsdscr], c15, c0, 6\n\t"
+ "isb\n\t"
+ :
+ : [avsdscr]"r" (avsdscr)
+ );
+}
+EXPORT_SYMBOL(avs_set_avsdscr);
+
+static void avs_enable_local(void *data)
+{
+ u32 avsdscr = (u32) data;
+ u32 avscsr_enable = 0x61;
+
+ avs_set_avsdscr(avsdscr);
+ avs_set_avscsr(avscsr_enable);
+}
+
+static void avs_disable_local(void *data)
+{
+ avs_set_avscsr(0);
+}
+
+void avs_enable(int cpu, u32 avsdscr)
+{
+ int ret;
+
+ ret = smp_call_function_single(cpu, avs_enable_local,
+ (void *)avsdscr, true);
+ WARN_ON(ret);
+}
+EXPORT_SYMBOL(avs_enable);
+
+void avs_disable(int cpu)
+{
+ int ret;
+
+ ret = smp_call_function_single(cpu, avs_disable_local,
+ (void *) 0, true);
+ WARN_ON(ret);
+}
+EXPORT_SYMBOL(avs_disable);
diff --git a/arch/arm/mach-msm/avs.h b/arch/arm/mach-msm/avs.h
index 556603a..f8b311c 100644
--- a/arch/arm/mach-msm/avs.h
+++ b/arch/arm/mach-msm/avs.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2009, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009,2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -15,42 +15,24 @@
#define AVS_H
#ifdef CONFIG_MSM_AVS_HW
-u32 avs_reset_delays(u32 avsdscr);
u32 avs_get_avscsr(void);
+void avs_set_avscsr(u32 avscsr);
u32 avs_get_avsdscr(void);
-u32 avs_get_tscsr(void);
-void avs_set_tscsr(u32 to_tscsr);
-u32 avs_disable(void);
-void avs_enable(u32 avscsr);
+void avs_set_avsdscr(u32 avsdscr);
+void avs_disable(int cpu);
+void avs_enable(int cpu, u32 avsdscr);
#else
-static inline u32 avs_reset_delays(u32 avsdscr)
-{ return 0; }
static inline u32 avs_get_avscsr(void)
{ return 0; }
+static inline void avs_set_avscsr(u32 avscsr) {}
static inline u32 avs_get_avsdscr(void)
{ return 0; }
-static inline u32 avs_get_tscsr(void)
-{ return 0; }
-static inline void avs_set_tscsr(u32 to_tscsr) {}
-static inline u32 avs_disable(void)
-{return 0; }
-static inline void avs_enable(u32 avscsr) {}
+static inline void avs_set_avsdscr(u32 avsdscr) {}
+static inline void avs_disable(int cpu) {}
+static inline void avs_enable(int cpu, u32 avsdscr) {}
#endif
-#define AVS_DISABLE(cpu) do { \
- if (get_cpu() == (cpu)) \
- avs_disable(); \
- put_cpu(); \
- } while (0);
+#define AVS_DISABLE(cpu) avs_disable(cpu)
+#define AVS_ENABLE(cpu, x) avs_enable(cpu, x)
-/* AVSCSR(0x61) to enable CPU, V and L2 AVS module */
-
-#define AVS_ENABLE(cpu, x) do { \
- if (get_cpu() == (cpu)) { \
- avs_reset_delays((x)); \
- avs_enable(0x61); \
- } \
- put_cpu(); \
- } while (0);
-
-#endif /* AVS_H */
+#endif
diff --git a/arch/arm/mach-msm/avs_hw.S b/arch/arm/mach-msm/avs_hw.S
deleted file mode 100644
index 6fad8bd..0000000
--- a/arch/arm/mach-msm/avs_hw.S
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright (c) 2009, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
- .text
-
- .global avs_get_avscsr
-/* Read r0=AVSCSR to get status from CPU, VFP, and L2 ring oscillators */
-
-avs_get_avscsr:
- mrc p15, 7, r0, c15, c1, 7
- bx lr
-
- .global avs_get_avsdscr
-/* Read r0=AVSDSCR to get the AVS Delay Synthesizer control settings */
-
-avs_get_avsdscr:
- mrc p15, 7, r0, c15, c0, 6
- bx lr
-
-
-
-
- .global avs_get_tscsr
-/* Read r0=TSCSR to get temperature sensor control and status */
-
-avs_get_tscsr:
- mrc p15, 7, r0, c15, c1, 0
- bx lr
-
- .global avs_set_tscsr
-/* Write TSCSR=r0 to set temperature sensor control and status */
-
-avs_set_tscsr:
- mcr p15, 7, r0, c15, c1, 0
- bx lr
-
-
-
-
-
- .global avs_reset_delays
-avs_reset_delays:
-
-/* AVSDSCR(dly) to program delay */
- mcr p15, 7, r0, c15, c0, 6
-
-/* Read r0=AVSDSCR */
- mrc p15, 7, r0, c15, c0, 6
- bx lr
-
- .global avs_enable
-avs_enable:
-/* Restore the avs_scr register */
- mcr p15, 7, r0, c15, c1, 7
- bx lr
-
- .global avs_disable
-avs_disable:
-
-/* Get the AVSCSR value */
- mrc p15, 7, r0, c15, c1, 7
-/* Clear AVSCSR */
- mov r1, #0
-/* Write AVSCSR */
- mcr p15, 7, r1, c15, c1, 7
-
- bx lr
-
- .end
-
-
diff --git a/arch/arm/mach-msm/pm-8x60.c b/arch/arm/mach-msm/pm-8x60.c
index 6fb4901..17419cd 100644
--- a/arch/arm/mach-msm/pm-8x60.c
+++ b/arch/arm/mach-msm/pm-8x60.c
@@ -523,15 +523,18 @@
static bool msm_pm_power_collapse_standalone(bool from_idle)
{
unsigned int cpu = smp_processor_id();
- unsigned int avsdscr_setting;
- unsigned int avscsr_enable;
+ unsigned int avsdscr;
+ unsigned int avscsr;
bool collapsed;
- avsdscr_setting = avs_get_avsdscr();
- avscsr_enable = avs_disable();
+ avsdscr = avs_get_avsdscr();
+ avscsr = avs_get_avscsr();
+ avs_set_avscsr(0); /* Disable AVS */
+
collapsed = msm_pm_spm_power_collapse(cpu, from_idle, false);
- avs_enable(avscsr_enable);
- avs_reset_delays(avsdscr_setting);
+
+ avs_set_avsdscr(avsdscr);
+ avs_set_avscsr(avscsr);
return collapsed;
}
@@ -539,8 +542,8 @@
{
unsigned int cpu = smp_processor_id();
unsigned long saved_acpuclk_rate;
- unsigned int avsdscr_setting;
- unsigned int avscsr_enable;
+ unsigned int avsdscr;
+ unsigned int avscsr;
bool collapsed;
if (MSM_PM_DEBUG_POWER_COLLAPSE & msm_pm_debug_mask)
@@ -551,8 +554,9 @@
if (MSM_PM_DEBUG_POWER_COLLAPSE & msm_pm_debug_mask)
pr_info("CPU%u: %s: pre power down\n", cpu, __func__);
- avsdscr_setting = avs_get_avsdscr();
- avscsr_enable = avs_disable();
+ avsdscr = avs_get_avsdscr();
+ avscsr = avs_get_avscsr();
+ avs_set_avscsr(0); /* Disable AVS */
if (cpu_online(cpu))
saved_acpuclk_rate = acpuclk_power_collapse();
@@ -588,8 +592,8 @@
}
- avs_enable(avscsr_enable);
- avs_reset_delays(avsdscr_setting);
+ avs_set_avsdscr(avsdscr);
+ avs_set_avscsr(avscsr);
msm_pm_config_hw_after_power_up();
if (MSM_PM_DEBUG_POWER_COLLAPSE & msm_pm_debug_mask)
pr_info("CPU%u: %s: post power up\n", cpu, __func__);