)]}'
{
  "commit": "2ac6bf4ddc87c3b6b609f8fa82f6ebbffeac12f4",
  "tree": "7de468eac9f948f85faebb2f86efbfd66737d8d9",
  "parents": [
    "ab6bf42e2339580b5d87746d0ff4da4b1578b03e"
  ],
  "author": {
    "name": "Jack Morgenstein",
    "email": "jackm@dev.mellanox.co.il",
    "time": "Fri Jun 05 10:36:24 2009 -0700"
  },
  "committer": {
    "name": "Roland Dreier",
    "email": "rolandd@cisco.com",
    "time": "Fri Jun 05 10:36:24 2009 -0700"
  },
  "message": "IB/mlx4: Add strong ordering to local inval and fast reg work requests\n\nThe ConnectX Programmer\u0027s Reference Manual states that the \"SO\" bit\nmust be set when posting Fast Register and Local Invalidate send work\nrequests.  When this bit is set, the work request will be executed\nonly after all previous work requests on the send queue have been\nexecuted.  (If the bit is not set, Fast Register and Local Invalidate\nWQEs may begin execution too early, which violates the defined\nsemantics for these operations)\n\nThis fixes the issue with NFS/RDMA reported in\n\u003chttp://lists.openfabrics.org/pipermail/general/2009-April/059253.html\u003e\n\nSigned-off-by: Jack Morgenstein \u003cjackm@dev.mellanox.co.il\u003e\nCc: \u003cstable@kernel.org\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "20724aee76f4766d80a9884da1e98f38d924ed50",
      "old_mode": 33188,
      "old_path": "drivers/infiniband/hw/mlx4/qp.c",
      "new_id": "c4a02648c8afe78ce6553e95fcc0742ed499274b",
      "new_mode": 33188,
      "new_path": "drivers/infiniband/hw/mlx4/qp.c"
    },
    {
      "type": "modify",
      "old_id": "bf8f11982dae374f70f3b8b79494823ca96d2e36",
      "old_mode": 33188,
      "old_path": "include/linux/mlx4/qp.h",
      "new_id": "9f29d86e5dc96fd4169911b918051b645d4b306d",
      "new_mode": 33188,
      "new_path": "include/linux/mlx4/qp.h"
    }
  ]
}