msm: pil: Delay after deasserting subsystem restart bits on 8974
The effects clearing *_RESTART registers are not immediate. A delay
is needed to ensure the subsystem is ready-to-go before registers
within it are manipulated. Fix this.
Change-Id: I12a996a7b5bf34c54a220aae90e8446f94dbdf8c
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
diff --git a/arch/arm/mach-msm/pil-pronto.c b/arch/arm/mach-msm/pil-pronto.c
index 58d5176..8897cb5 100644
--- a/arch/arm/mach-msm/pil-pronto.c
+++ b/arch/arm/mach-msm/pil-pronto.c
@@ -117,11 +117,12 @@
void __iomem *base = drv->base;
unsigned long start_addr = drv->start_addr;
- /* Deassert reset to Pronto */
+ /* Deassert reset to subsystem and wait for propagation */
reg = readl_relaxed(drv->reset_base);
reg &= ~CLK_CTL_WCNSS_RESTART_BIT;
writel_relaxed(reg, drv->reset_base);
mb();
+ udelay(2);
/* Configure boot address */
writel_relaxed(start_addr >> 16, base +
diff --git a/arch/arm/mach-msm/pil-q6v5-mss.c b/arch/arm/mach-msm/pil-q6v5-mss.c
index 62685ca..ff0e792d 100644
--- a/arch/arm/mach-msm/pil-q6v5-mss.c
+++ b/arch/arm/mach-msm/pil-q6v5-mss.c
@@ -139,8 +139,10 @@
struct q6v5_data *drv = dev_get_drvdata(pil->dev);
int ret;
+ /* Deassert reset to subsystem and wait for propagation */
writel_relaxed(0, drv->restart_reg);
mb();
+ udelay(2);
/*
* Bring subsystem out of reset and enable required