msm: kgsl: Add CP_DRAW_INDX commands after a context save
Issue an empty draw call to avoid possible hangs due to
repeated idles without intervening draw calls.
On adreno 225 the PC block has a cache that is only
flushed on draw calls and repeated idles can make it
overflow if there are not intervening draw calls.
The gmem save path contains draw calls so this workaround
isn't needed there.
CRs-Fixed: 316084
CRs-Fixed: 317712
Change-Id: I280468b61fd3a6b6ffb30a1cdf118399f115f0dd
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
diff --git a/drivers/gpu/msm/adreno_a2xx.c b/drivers/gpu/msm/adreno_a2xx.c
index 6003846..5acf23d 100644
--- a/drivers/gpu/msm/adreno_a2xx.c
+++ b/drivers/gpu/msm/adreno_a2xx.c
@@ -1322,6 +1322,7 @@
struct adreno_context *context)
{
struct kgsl_device *device = &adreno_dev->dev;
+ unsigned int cmd[22];
if (context == NULL)
return;
@@ -1363,6 +1364,30 @@
context->chicken_restore, 3);
context->flags |= CTXT_FLAGS_GMEM_RESTORE;
+ } else if (adreno_is_a225(adreno_dev)) {
+ unsigned int *cmds = &cmd[0];
+ /*
+ * Issue an empty draw call to avoid possible hangs due to
+ * repeated idles without intervening draw calls.
+ * On adreno 225 the PC block has a cache that is only
+ * flushed on draw calls and repeated idles can make it
+ * overflow. The gmem save path contains draw calls so
+ * this workaround isn't needed there.
+ */
+ *cmds++ = cp_type3_packet(CP_SET_CONSTANT, 2);
+ *cmds++ = (0x4 << 16) | (REG_PA_SU_SC_MODE_CNTL - 0x2000);
+ *cmds++ = 0;
+ *cmds++ = cp_type3_packet(CP_DRAW_INDX, 5);
+ *cmds++ = 0;
+ *cmds++ = 1<<14;
+ *cmds++ = 0;
+ *cmds++ = device->mmu.setstate_memory.gpuaddr;
+ *cmds++ = 0;
+ *cmds++ = cp_type3_packet(CP_WAIT_FOR_IDLE, 1);
+ *cmds++ = 0x00000000;
+
+ adreno_ringbuffer_issuecmds(device, KGSL_CMD_FLAGS_PMODE,
+ &cmd[0], 11);
}
}