[ARM] 4595/1: ns9xxx: define registers as void __iomem * instead of volatile u32
As a consequence registers are now accessed with __raw_{read,write}[bl].
Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
diff --git a/include/asm-arm/arch-ns9xxx/clock.h b/include/asm-arm/arch-ns9xxx/clock.h
index 90604d4..b943d3a 100644
--- a/include/asm-arm/arch-ns9xxx/clock.h
+++ b/include/asm-arm/arch-ns9xxx/clock.h
@@ -19,7 +19,7 @@
static inline u32 ns9xxx_systemclock(void) __attribute__((const));
static inline u32 ns9xxx_systemclock(void)
{
- u32 pll = SYS_PLL;
+ u32 pll = __raw_readl(SYS_PLL);
/*
* The system clock should be a multiple of HZ * TIMERCLOCKSELECT (in
diff --git a/include/asm-arm/arch-ns9xxx/hardware.h b/include/asm-arm/arch-ns9xxx/hardware.h
index b5d66f9..0b7b346 100644
--- a/include/asm-arm/arch-ns9xxx/hardware.h
+++ b/include/asm-arm/arch-ns9xxx/hardware.h
@@ -35,11 +35,8 @@
#ifndef __ASSEMBLY__
-# define __REG(x) (*((volatile u32 *)io_p2v((x))))
-# define __REG2(x, y) (*((volatile u32 *)io_p2v((x)) + (y)))
-
-# define __REGB(x) (*((volatile u8 *)io_p2v((x))))
-# define __REGB2(x) (*((volatile u8 *)io_p2v((x)) + (y)))
+# define __REG(x) ((void __iomem __force *)io_p2v((x)))
+# define __REG2(x, y) ((void __iomem __force *)(io_p2v((x)) + 4 * (y)))
# define __REGSET(var, field, value) \
((var) = (((var) & ~((field) & ~(value))) | (value)))
@@ -77,9 +74,6 @@
# define __REG(x) io_p2v(x)
# define __REG2(x, y) io_p2v((x) + (y))
-# define __REGB(x) __REG((x))
-# define __REGB2(x, y) __REG2((x), (y))
-
#endif
#endif /* ifndef __ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h b/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h
index c3dc532..afa3a9d 100644
--- a/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h
+++ b/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h
@@ -18,7 +18,7 @@
#define FPGA_UARTC_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x10)
#define FPGA_UARTD_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x18)
-#define FPGA_IER __REGB(NS9XXX_CSxSTAT_PHYS(0) + 0x50)
-#define FPGA_ISR __REGB(NS9XXX_CSxSTAT_PHYS(0) + 0x60)
+#define FPGA_IER __REG(NS9XXX_CSxSTAT_PHYS(0) + 0x50)
+#define FPGA_ISR __REG(NS9XXX_CSxSTAT_PHYS(0) + 0x60)
#endif /* ifndef __ASM_ARCH_REGSBOARDA9M9750_H */
diff --git a/include/asm-arm/arch-ns9xxx/system.h b/include/asm-arm/arch-ns9xxx/system.h
index e3cd4d3..c1082bd 100644
--- a/include/asm-arm/arch-ns9xxx/system.h
+++ b/include/asm-arm/arch-ns9xxx/system.h
@@ -24,9 +24,9 @@
{
u32 reg;
- reg = SYS_PLL >> 16;
+ reg = __raw_readl(SYS_PLL) >> 16;
REGSET(reg, SYS_PLL, SWC, YES);
- SYS_PLL = reg;
+ __raw_writel(reg, SYS_PLL);
BUG();
}