[ARM] 4576/1: CM-X270 machine support
This patch provides core support for CM-X270 platform.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
diff --git a/include/asm-arm/arch-pxa/cm-x270.h b/include/asm-arm/arch-pxa/cm-x270.h
new file mode 100644
index 0000000..f8fac9e
--- /dev/null
+++ b/include/asm-arm/arch-pxa/cm-x270.h
@@ -0,0 +1,50 @@
+/*
+ * linux/include/asm/arch-pxa/cm-x270.h
+ *
+ * Copyright Compulab Ltd., 2003, 2007
+ * Mike Rapoport <mike@compulab.co.il>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+
+/* CM-x270 device physical addresses */
+#define CMX270_CS1_PHYS (PXA_CS1_PHYS)
+#define MARATHON_PHYS (PXA_CS2_PHYS)
+#define CMX270_IDE104_PHYS (PXA_CS3_PHYS)
+#define CMX270_IT8152_PHYS (PXA_CS4_PHYS)
+
+/* Statically mapped regions */
+#define CMX270_VIRT_BASE (0xe8000000)
+#define CMX270_IT8152_VIRT (CMX270_VIRT_BASE)
+#define CMX270_IDE104_VIRT (CMX270_IT8152_VIRT + SZ_64M)
+
+/* GPIO related definitions */
+#define GPIO_IT8152_IRQ (22)
+
+#define IRQ_GPIO_IT8152_IRQ IRQ_GPIO(GPIO_IT8152_IRQ)
+#define PME_IRQ IRQ_GPIO(0)
+#define CMX270_IDE_IRQ IRQ_GPIO(100)
+#define CMX270_GPIRQ1 IRQ_GPIO(101)
+#define CMX270_TOUCHIRQ IRQ_GPIO(96)
+#define CMX270_ETHIRQ IRQ_GPIO(10)
+#define CMX270_GFXIRQ IRQ_GPIO(95)
+#define CMX270_NANDIRQ IRQ_GPIO(89)
+#define CMX270_MMC_IRQ IRQ_GPIO(83)
+
+/* PCMCIA related definitions */
+#define PCC_DETECT(x) (GPLR(84 - (x)) & GPIO_bit(84 - (x)))
+#define PCC_READY(x) (GPLR(82 - (x)) & GPIO_bit(82 - (x)))
+
+#define PCMCIA_S0_CD_VALID IRQ_GPIO(84)
+#define PCMCIA_S0_CD_VALID_EDGE GPIO_BOTH_EDGES
+
+#define PCMCIA_S1_CD_VALID IRQ_GPIO(83)
+#define PCMCIA_S1_CD_VALID_EDGE GPIO_BOTH_EDGES
+
+#define PCMCIA_S0_RDYINT IRQ_GPIO(82)
+#define PCMCIA_S1_RDYINT IRQ_GPIO(81)
+
+#define PCMCIA_RESET_GPIO 53
diff --git a/include/asm-arm/arch-pxa/dma.h b/include/asm-arm/arch-pxa/dma.h
index 3280ee2..dbe110e 100644
--- a/include/asm-arm/arch-pxa/dma.h
+++ b/include/asm-arm/arch-pxa/dma.h
@@ -30,6 +30,10 @@
DMA_PRIO_LOW = 2
} pxa_dma_prio;
+#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
+#define HAVE_ARCH_PCI_SET_DMA_MASK 1
+#endif
+
/*
* DMA registration
*/
diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h
index 89df077..ab2d963 100644
--- a/include/asm-arm/arch-pxa/hardware.h
+++ b/include/asm-arm/arch-pxa/hardware.h
@@ -215,4 +215,10 @@
#endif
+#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
+#define PCIBIOS_MIN_IO 0
+#define PCIBIOS_MIN_MEM 0
+#define pcibios_assign_all_busses() 1
+#endif
+
#endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h
index 1bcc763..6238dbf 100644
--- a/include/asm-arm/arch-pxa/irqs.h
+++ b/include/asm-arm/arch-pxa/irqs.h
@@ -210,3 +210,24 @@
#define IRQ_LOCOMO_GPIO_BASE (IRQ_BOARD_START + 1)
#define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2)
#define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3)
+
+/* ITE8152 irqs */
+/* add IT8152 IRQs beyond BOARD_END */
+#ifdef CONFIG_PCI_HOST_ITE8152
+#define IT8152_IRQ(x) (IRQ_GPIO(IRQ_BOARD_END) + 1 + (x))
+
+/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
+#define IT8152_LD_IRQ_COUNT 9
+#define IT8152_LP_IRQ_COUNT 16
+#define IT8152_PD_IRQ_COUNT 15
+
+/* Priorities: */
+#define IT8152_PD_IRQ(i) IT8152_IRQ(i)
+#define IT8152_LP_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
+#define IT8152_LD_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)
+
+#define IT8152_LAST_IRQ IT8152_LD_IRQ(IT8152_LD_IRQ_COUNT - 1)
+
+#undef NR_IRQS
+#define NR_IRQS (IT8152_LAST_IRQ+1)
+#endif
diff --git a/include/asm-arm/arch-pxa/memory.h b/include/asm-arm/arch-pxa/memory.h
index e17f988..bee81d6 100644
--- a/include/asm-arm/arch-pxa/memory.h
+++ b/include/asm-arm/arch-pxa/memory.h
@@ -39,4 +39,14 @@
*/
#define NODE_MEM_SIZE_BITS 26
+#if !defined(__ASSEMBLY__) && defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
+void cmx270_pci_adjust_zones(int node, unsigned long *size,
+ unsigned long *holes);
+
+#define arch_adjust_zones(node, size, holes) \
+ cmx270_pci_adjust_zones(node, size, holes)
+
+#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1)
+#endif
+
#endif