)]}'
{
  "commit": "36a68e77c554f1ef1c206fd618e6daf82d3e38a3",
  "tree": "59a4591b76ef18e54b5b1b2687268e0dd6bb69ef",
  "parents": [
    "12eaa328f9fb2d3fcb5afb682c762690d05a3cd8"
  ],
  "author": {
    "name": "David S. Miller",
    "email": "davem@sunset.davemloft.net",
    "time": "Sat Feb 11 00:29:34 2006 -0800"
  },
  "committer": {
    "name": "David S. Miller",
    "email": "davem@sunset.davemloft.net",
    "time": "Mon Mar 20 01:12:16 2006 -0800"
  },
  "message": "[SPARC64]: Simplify sun4v TLB handling using macros.\n\nThere was also a bug in sun4v_itlb_miss, it loaded the\nMMU Fault Status base into %g3 instead of %g2.\n\nThis pointed out a fast path for TSB miss processing,\nsince we have %g2 with the MMU Fault Status base, we\ncan use that to quickly load up the PGD phys address.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "f6222623de38bc1243122620455de643c4f6850c",
      "old_mode": 33188,
      "old_path": "arch/sparc64/kernel/sun4v_tlb_miss.S",
      "new_id": "f7129137f9a4bb8841b9c204c5cce6f01f021a88",
      "new_mode": 33188,
      "new_path": "arch/sparc64/kernel/sun4v_tlb_miss.S"
    },
    {
      "type": "modify",
      "old_id": "8a9351258af8829277e19de58ec9a5f49352f5b1",
      "old_mode": 33188,
      "old_path": "arch/sparc64/kernel/tsb.S",
      "new_id": "667dcb077be78db3a62c21c010516230ee9dda39",
      "new_mode": 33188,
      "new_path": "arch/sparc64/kernel/tsb.S"
    }
  ]
}