sh: Get SH-5 caches working again post-unification.
A number of cleanups to get the SH-5 cache management code in line with
the rest of the SH backend.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
diff --git a/include/asm-sh/cpu-sh5/cacheflush.h b/include/asm-sh/cpu-sh5/cacheflush.h
index f935acb..5a11f0b 100644
--- a/include/asm-sh/cpu-sh5/cacheflush.h
+++ b/include/asm-sh/cpu-sh5/cacheflush.h
@@ -3,8 +3,6 @@
#ifndef __ASSEMBLY__
-#include <asm/page.h>
-
struct vm_area_struct;
struct page;
struct mm_struct;
@@ -27,7 +25,7 @@
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
#define flush_icache_page(vma, page) do { } while (0)
-#define p3_cache_init() do { } while (0)
+void p3_cache_init(void);
#endif /* __ASSEMBLY__ */
diff --git a/include/asm-sh/mmu_context_64.h b/include/asm-sh/mmu_context_64.h
index 020be74..9649f1c 100644
--- a/include/asm-sh/mmu_context_64.h
+++ b/include/asm-sh/mmu_context_64.h
@@ -66,6 +66,9 @@
: "=r" (sr), "=r" (pc) : "0" (sr));
}
+/* arch/sh/kernel/cpu/sh5/entry.S */
+extern unsigned long switch_and_save_asid(unsigned long new_asid);
+
/* No spare register to twiddle, so use a software cache */
extern pgd_t *mmu_pdtp_cache;
diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h
index 134562d..304c30b 100644
--- a/include/asm-sh/page.h
+++ b/include/asm-sh/page.h
@@ -55,11 +55,14 @@
extern void copy_page(void *to, void *from);
#if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU) && \
- (defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB))
+ (defined(CONFIG_CPU_SH5) || defined(CONFIG_CPU_SH4) || \
+ defined(CONFIG_SH7705_CACHE_32KB))
struct page;
struct vm_area_struct;
extern void clear_user_page(void *to, unsigned long address, struct page *page);
-#ifdef CONFIG_CPU_SH4
+extern void copy_user_page(void *to, void *from, unsigned long address,
+ struct page *page);
+#if defined(CONFIG_CPU_SH4)
extern void copy_user_highpage(struct page *to, struct page *from,
unsigned long vaddr, struct vm_area_struct *vma);
#define __HAVE_ARCH_COPY_USER_HIGHPAGE