gpio: msm: Add TLMM pad support for SDC2
TLMM v3 version has dedicated pads for only SDC1
and SDC2 among all SDC slots as opposed to v2 version.
Change-Id: I73c54f0a2799e6ffca74e5b846ac8339d0af3bb8
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
diff --git a/arch/arm/mach-msm/include/mach/gpio.h b/arch/arm/mach-msm/include/mach/gpio.h
index 1d32003..a0bcd2b 100644
--- a/arch/arm/mach-msm/include/mach/gpio.h
+++ b/arch/arm/mach-msm/include/mach/gpio.h
@@ -162,17 +162,24 @@
TLMM_HDRV_SDC3_CLK,
TLMM_HDRV_SDC3_CMD,
TLMM_HDRV_SDC3_DATA,
+ TLMM_HDRV_SDC2_CLK,
+ TLMM_HDRV_SDC2_CMD,
+ TLMM_HDRV_SDC2_DATA,
TLMM_HDRV_SDC1_CLK,
TLMM_HDRV_SDC1_CMD,
TLMM_HDRV_SDC1_DATA,
};
enum msm_tlmm_pull_tgt {
- TLMM_PULL_SDC4_CMD = 0,
+ TLMM_PULL_SDC4_CLK = 0,
+ TLMM_PULL_SDC4_CMD,
TLMM_PULL_SDC4_DATA,
TLMM_PULL_SDC3_CLK,
TLMM_PULL_SDC3_CMD,
TLMM_PULL_SDC3_DATA,
+ TLMM_PULL_SDC2_CLK,
+ TLMM_PULL_SDC2_CMD,
+ TLMM_PULL_SDC2_DATA,
TLMM_PULL_SDC1_CLK,
TLMM_PULL_SDC1_CMD,
TLMM_PULL_SDC1_DATA,
diff --git a/drivers/gpio/gpio-msm-common.c b/drivers/gpio/gpio-msm-common.c
index 5539950..f268f33 100644
--- a/drivers/gpio/gpio-msm-common.c
+++ b/drivers/gpio/gpio-msm-common.c
@@ -31,11 +31,21 @@
#include <mach/mpm.h>
#include "gpio-msm-common.h"
+#ifdef CONFIG_GPIO_MSM_V3
+enum msm_tlmm_register {
+ SDC4_HDRV_PULL_CTL = 0x0, /* NOT USED */
+ SDC3_HDRV_PULL_CTL = 0x0, /* NOT USED */
+ SDC2_HDRV_PULL_CTL = 0x2048,
+ SDC1_HDRV_PULL_CTL = 0x2044,
+};
+#else
enum msm_tlmm_register {
SDC4_HDRV_PULL_CTL = 0x20a0,
SDC3_HDRV_PULL_CTL = 0x20a4,
+ SDC2_HDRV_PULL_CTL = 0x0, /* NOT USED */
SDC1_HDRV_PULL_CTL = 0x20a0,
};
+#endif
struct tlmm_field_cfg {
enum msm_tlmm_register reg;
@@ -49,17 +59,24 @@
{SDC3_HDRV_PULL_CTL, 6}, /* TLMM_HDRV_SDC3_CLK */
{SDC3_HDRV_PULL_CTL, 3}, /* TLMM_HDRV_SDC3_CMD */
{SDC3_HDRV_PULL_CTL, 0}, /* TLMM_HDRV_SDC3_DATA */
+ {SDC2_HDRV_PULL_CTL, 6}, /* TLMM_HDRV_SDC2_CLK */
+ {SDC2_HDRV_PULL_CTL, 3}, /* TLMM_HDRV_SDC2_CMD */
+ {SDC2_HDRV_PULL_CTL, 0}, /* TLMM_HDRV_SDC2_DATA */
{SDC1_HDRV_PULL_CTL, 6}, /* TLMM_HDRV_SDC1_CLK */
{SDC1_HDRV_PULL_CTL, 3}, /* TLMM_HDRV_SDC1_CMD */
{SDC1_HDRV_PULL_CTL, 0}, /* TLMM_HDRV_SDC1_DATA */
};
static const struct tlmm_field_cfg tlmm_pull_cfgs[] = {
+ {SDC4_HDRV_PULL_CTL, 14}, /* TLMM_PULL_SDC4_CLK */
{SDC4_HDRV_PULL_CTL, 11}, /* TLMM_PULL_SDC4_CMD */
{SDC4_HDRV_PULL_CTL, 9}, /* TLMM_PULL_SDC4_DATA */
{SDC3_HDRV_PULL_CTL, 14}, /* TLMM_PULL_SDC3_CLK */
{SDC3_HDRV_PULL_CTL, 11}, /* TLMM_PULL_SDC3_CMD */
{SDC3_HDRV_PULL_CTL, 9}, /* TLMM_PULL_SDC3_DATA */
+ {SDC2_HDRV_PULL_CTL, 14}, /* TLMM_PULL_SDC2_CLK */
+ {SDC2_HDRV_PULL_CTL, 11}, /* TLMM_PULL_SDC2_CMD */
+ {SDC2_HDRV_PULL_CTL, 9}, /* TLMM_PULL_SDC2_DATA */
{SDC1_HDRV_PULL_CTL, 13}, /* TLMM_PULL_SDC1_CLK */
{SDC1_HDRV_PULL_CTL, 11}, /* TLMM_PULL_SDC1_CMD */
{SDC1_HDRV_PULL_CTL, 9}, /* TLMM_PULL_SDC1_DATA */