coresight: switch to use coresight core layer code
Switch all CoreSight drivers to start using the new CoreSight core
layer code. Remove obsolete qdss code.
Change-Id: I2d4496aea0ffd918e0bfbf4b4e58ad82ea634a59
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index 724eed8..e07301a 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -3457,95 +3457,199 @@
#endif /* CONFIG_MSM_DSPS */
-#ifdef CONFIG_MSM_QDSS
+#define CORESIGHT_PHYS_BASE 0x01A00000
+#define CORESIGHT_TPIU_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x3000)
+#define CORESIGHT_ETB_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x1000)
+#define CORESIGHT_FUNNEL_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x4000)
+#define CORESIGHT_STM_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x6000)
+#define CORESIGHT_ETM0_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x1C000)
+#define CORESIGHT_ETM1_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x1D000)
-#define MSM_QDSS_PHYS_BASE 0x01A00000
-#define MSM_ETB_PHYS_BASE (MSM_QDSS_PHYS_BASE + 0x1000)
-#define MSM_TPIU_PHYS_BASE (MSM_QDSS_PHYS_BASE + 0x3000)
-#define MSM_FUNNEL_PHYS_BASE (MSM_QDSS_PHYS_BASE + 0x4000)
-#define MSM_ETM_PHYS_BASE (MSM_QDSS_PHYS_BASE + 0x1C000)
+#define CORESIGHT_STM_CHANNEL_PHYS_BASE (0x14000000 + 0x280000)
-#define QDSS_SOURCE(src_name, fpm) { .name = src_name, .fport_mask = fpm, }
-
-static struct qdss_source msm_qdss_sources[] = {
- QDSS_SOURCE("msm_etm", 0x3),
-};
-
-static struct msm_qdss_platform_data qdss_pdata = {
- .src_table = msm_qdss_sources,
- .size = ARRAY_SIZE(msm_qdss_sources),
- .afamily = 1,
-};
-
-struct platform_device msm_qdss_device = {
- .name = "msm_qdss",
- .id = -1,
- .dev = {
- .platform_data = &qdss_pdata,
- },
-};
-
-static struct resource msm_etb_resources[] = {
+static struct resource coresight_tpiu_resources[] = {
{
- .start = MSM_ETB_PHYS_BASE,
- .end = MSM_ETB_PHYS_BASE + SZ_4K - 1,
+ .start = CORESIGHT_TPIU_PHYS_BASE,
+ .end = CORESIGHT_TPIU_PHYS_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
};
-struct platform_device msm_etb_device = {
- .name = "msm_etb",
- .id = 0,
- .num_resources = ARRAY_SIZE(msm_etb_resources),
- .resource = msm_etb_resources,
+static struct coresight_platform_data coresight_tpiu_pdata = {
+ .id = 0,
+ .name = "coresight-tpiu",
+ .nr_inports = 1,
+ .nr_outports = 0,
};
-static struct resource msm_tpiu_resources[] = {
+struct platform_device coresight_tpiu_device = {
+ .name = "coresight-tpiu",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(coresight_tpiu_resources),
+ .resource = coresight_tpiu_resources,
+ .dev = {
+ .platform_data = &coresight_tpiu_pdata,
+ },
+};
+
+static struct resource coresight_etb_resources[] = {
{
- .start = MSM_TPIU_PHYS_BASE,
- .end = MSM_TPIU_PHYS_BASE + SZ_4K - 1,
+ .start = CORESIGHT_ETB_PHYS_BASE,
+ .end = CORESIGHT_ETB_PHYS_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
};
-struct platform_device msm_tpiu_device = {
- .name = "msm_tpiu",
- .id = 0,
- .num_resources = ARRAY_SIZE(msm_tpiu_resources),
- .resource = msm_tpiu_resources,
+static struct coresight_platform_data coresight_etb_pdata = {
+ .id = 1,
+ .name = "coresight-etb",
+ .nr_inports = 1,
+ .nr_outports = 0,
+ .default_sink = true,
};
-static struct resource msm_funnel_resources[] = {
+struct platform_device coresight_etb_device = {
+ .name = "coresight-etb",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(coresight_etb_resources),
+ .resource = coresight_etb_resources,
+ .dev = {
+ .platform_data = &coresight_etb_pdata,
+ },
+};
+
+static struct resource coresight_funnel_resources[] = {
{
- .start = MSM_FUNNEL_PHYS_BASE,
- .end = MSM_FUNNEL_PHYS_BASE + SZ_4K - 1,
+ .start = CORESIGHT_FUNNEL_PHYS_BASE,
+ .end = CORESIGHT_FUNNEL_PHYS_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
};
-struct platform_device msm_funnel_device = {
- .name = "msm_funnel",
- .id = 0,
- .num_resources = ARRAY_SIZE(msm_funnel_resources),
- .resource = msm_funnel_resources,
+static const int coresight_funnel_outports[] = { 0, 1 };
+static const int coresight_funnel_child_ids[] = { 0, 1 };
+static const int coresight_funnel_child_ports[] = { 0, 0 };
+
+static struct coresight_platform_data coresight_funnel_pdata = {
+ .id = 2,
+ .name = "coresight-funnel",
+ .nr_inports = 4,
+ .outports = coresight_funnel_outports,
+ .child_ids = coresight_funnel_child_ids,
+ .child_ports = coresight_funnel_child_ports,
+ .nr_outports = ARRAY_SIZE(coresight_funnel_outports),
};
-static struct resource msm_etm_resources[] = {
+struct platform_device coresight_funnel_device = {
+ .name = "coresight-funnel",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(coresight_funnel_resources),
+ .resource = coresight_funnel_resources,
+ .dev = {
+ .platform_data = &coresight_funnel_pdata,
+ },
+};
+
+static struct resource coresight_stm_resources[] = {
{
- .start = MSM_ETM_PHYS_BASE,
- .end = MSM_ETM_PHYS_BASE + (SZ_4K * 2) - 1,
+ .start = CORESIGHT_STM_PHYS_BASE,
+ .end = CORESIGHT_STM_PHYS_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = CORESIGHT_STM_CHANNEL_PHYS_BASE,
+ .end = CORESIGHT_STM_CHANNEL_PHYS_BASE + SZ_1M + SZ_512K - 1,
.flags = IORESOURCE_MEM,
},
};
-struct platform_device msm_etm_device = {
- .name = "msm_etm",
- .id = 0,
- .num_resources = ARRAY_SIZE(msm_etm_resources),
- .resource = msm_etm_resources,
+static const int coresight_stm_outports[] = { 0 };
+static const int coresight_stm_child_ids[] = { 2 };
+static const int coresight_stm_child_ports[] = { 2 };
+
+static struct coresight_platform_data coresight_stm_pdata = {
+ .id = 3,
+ .name = "coresight-stm",
+ .nr_inports = 0,
+ .outports = coresight_stm_outports,
+ .child_ids = coresight_stm_child_ids,
+ .child_ports = coresight_stm_child_ports,
+ .nr_outports = ARRAY_SIZE(coresight_stm_outports),
};
-#endif
+struct platform_device coresight_stm_device = {
+ .name = "coresight-stm",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(coresight_stm_resources),
+ .resource = coresight_stm_resources,
+ .dev = {
+ .platform_data = &coresight_stm_pdata,
+ },
+};
+
+static struct resource coresight_etm0_resources[] = {
+ {
+ .start = CORESIGHT_ETM0_PHYS_BASE,
+ .end = CORESIGHT_ETM0_PHYS_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static const int coresight_etm0_outports[] = { 0 };
+static const int coresight_etm0_child_ids[] = { 2 };
+static const int coresight_etm0_child_ports[] = { 0 };
+
+static struct coresight_platform_data coresight_etm0_pdata = {
+ .id = 4,
+ .name = "coresight-etm0",
+ .nr_inports = 0,
+ .outports = coresight_etm0_outports,
+ .child_ids = coresight_etm0_child_ids,
+ .child_ports = coresight_etm0_child_ports,
+ .nr_outports = ARRAY_SIZE(coresight_etm0_outports),
+};
+
+struct platform_device coresight_etm0_device = {
+ .name = "coresight-etm",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(coresight_etm0_resources),
+ .resource = coresight_etm0_resources,
+ .dev = {
+ .platform_data = &coresight_etm0_pdata,
+ },
+};
+
+static struct resource coresight_etm1_resources[] = {
+ {
+ .start = CORESIGHT_ETM1_PHYS_BASE,
+ .end = CORESIGHT_ETM1_PHYS_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static const int coresight_etm1_outports[] = { 0 };
+static const int coresight_etm1_child_ids[] = { 2 };
+static const int coresight_etm1_child_ports[] = { 1 };
+
+static struct coresight_platform_data coresight_etm1_pdata = {
+ .id = 5,
+ .name = "coresight-etm1",
+ .nr_inports = 0,
+ .outports = coresight_etm1_outports,
+ .child_ids = coresight_etm1_child_ids,
+ .child_ports = coresight_etm1_child_ports,
+ .nr_outports = ARRAY_SIZE(coresight_etm1_outports),
+};
+
+struct platform_device coresight_etm1_device = {
+ .name = "coresight-etm",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(coresight_etm1_resources),
+ .resource = coresight_etm1_resources,
+ .dev = {
+ .platform_data = &coresight_etm1_pdata,
+ },
+};
static struct resource msm_ebi1_ch0_erp_resources[] = {
{