)]}'
{
  "commit": "3c8e1a84fd6b984a7bce8816db2e3defc57bbfe4",
  "tree": "52761ad5f2229d0b176ca36b7107a0ec43e1168f",
  "parents": [
    "04bb2a031cf95b34b7432dd47b318a932a895b4c"
  ],
  "author": {
    "name": "Marek Szyprowski",
    "email": "m.szyprowski@samsung.com",
    "time": "Wed Jun 30 14:27:37 2010 -0600"
  },
  "committer": {
    "name": "Grant Likely",
    "email": "grant.likely@secretlab.ca",
    "time": "Sat Jul 03 22:45:44 2010 -0600"
  },
  "message": "spi/spi-gpio: add support for controllers without MISO or MOSI pin\n\nThere are some boards that do not strictly follow SPI standard and use\nonly 3 wires (SCLK, MOSI or MISO, SS) for connecting some simple auxiliary\nchips and controls them with GPIO based \u0027spi controller\u0027. In this\nconfiguration the MISO or MOSI line is missing (it is not required if the\nchip does not transfer any data back to host or host only reads data from\nchip).\n\nThis patch adds support for such non-standard configuration in GPIO-based\nSPI controller. It has been tested in configuration without MISO pin.\n\nReviewed-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nSigned-off-by: Marek Szyprowski \u003cm.szyprowski@samsung.com\u003e\nAcked-by: David Brownell \u003cdbrownell@users.sourceforge.net\u003e\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "82b480cc9637939376bf3b4845ca3bc029d599a7",
      "old_mode": 33188,
      "old_path": "drivers/spi/spi_gpio.c",
      "new_id": "e24a63498acb84f7e4f9f83710aca3fadefcc177",
      "new_mode": 33188,
      "new_path": "drivers/spi/spi_gpio.c"
    },
    {
      "type": "modify",
      "old_id": "ca6782ee4b9fce4f9208020e552129db6f0fbd5a",
      "old_mode": 33188,
      "old_path": "include/linux/spi/spi_gpio.h",
      "new_id": "369b3d7d5b956069f3773e6fd4610cb278c8f757",
      "new_mode": 33188,
      "new_path": "include/linux/spi/spi_gpio.h"
    }
  ]
}