)]}'
{
  "commit": "3da9e9d34ed7d2f5c33fd194d9dd09e15f4e51c0",
  "tree": "676f0a5cbdec0e21ac3a69f077037303a612633a",
  "parents": [
    "44ada1a147fa28ae15b83a031c48fc2b992cc3ef",
    "07f4f3e8a24138ca2f3650723d670df25687cd05"
  ],
  "author": {
    "name": "Linus Torvalds",
    "email": "torvalds@linux-foundation.org",
    "time": "Fri May 29 08:48:13 2009 -0700"
  },
  "committer": {
    "name": "Linus Torvalds",
    "email": "torvalds@linux-foundation.org",
    "time": "Fri May 29 08:48:13 2009 -0700"
  },
  "message": "Merge branch \u0027drm-intel-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel\n\n* \u0027drm-intel-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel:\n  i915: Set object to gtt domain when faulting it back in\n  drm/i915: Apply a big hammer to 865 GEM object CPU cache flushing.\n  drm/i915: Fix tiling pitch handling on 8xx.\n",
  "tree_diff": []
}