)]}'
{
  "commit": "3e18a45abc5b20db2e34f02b87226ac2713bbb13",
  "tree": "1d0821530b802c1dd9bc20b09e7c5485f113201b",
  "parents": [
    "26705ca46bdf81113cc6729eb12b9eee2263bbfc"
  ],
  "author": {
    "name": "Todd Poynor",
    "email": "tpoynor@mvista.com",
    "time": "Fri Jul 01 11:27:06 2005 +0100"
  },
  "committer": {
    "name": "Russell King",
    "email": "rmk+kernel@arm.linux.org.uk",
    "time": "Fri Jul 01 11:27:06 2005 +0100"
  },
  "message": "[PATCH] ARM: 2782/1: PXA27x MDREFR K0DB4 define\n\nPatch from Todd Poynor\n\nAdd definition of K0DB4 SDCLK\u003c0,3\u003e divide-by-4 control/status bit in the\nMDREFR register for Intel XScale PXA27x.\n\nSigned-off-by: Todd Poynor \u003ctpoynor@mvista.com\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "803dc92c90389ad3965597640ebab0dbf3e3f2fd",
      "old_mode": 33188,
      "old_path": "include/asm-arm/arch-pxa/pxa-regs.h",
      "new_id": "51f0fe0ac165bb4a6ee64f69faeaa2576994fce8",
      "new_mode": 33188,
      "new_path": "include/asm-arm/arch-pxa/pxa-regs.h"
    }
  ]
}