Initial Contribution
msm-2.6.38: tag AU_LINUX_ANDROID_GINGERBREAD.02.03.04.00.142
Signed-off-by: Bryan Huntsman <bryanh@codeaurora.org>
diff --git a/include/media/Kbuild b/include/media/Kbuild
new file mode 100644
index 0000000..1033517
--- /dev/null
+++ b/include/media/Kbuild
@@ -0,0 +1,4 @@
+header-y += tavarua.h
+
+header-y += msm_camera.h
+header-y += msm_gemini.h
diff --git a/include/media/msm_camera.h b/include/media/msm_camera.h
new file mode 100644
index 0000000..4544a67
--- /dev/null
+++ b/include/media/msm_camera.h
@@ -0,0 +1,798 @@
+#ifndef __LINUX_MSM_CAMERA_H
+#define __LINUX_MSM_CAMERA_H
+
+#ifdef MSM_CAMERA_BIONIC
+#include <sys/types.h>
+#endif
+#include <linux/types.h>
+#include <linux/ioctl.h>
+#include <linux/cdev.h>
+#ifdef MSM_CAMERA_GCC
+#include <time.h>
+#else
+#include <linux/time.h>
+#endif
+
+#define MSM_CAM_IOCTL_MAGIC 'm'
+
+#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
+ _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
+
+#define MSM_CAM_IOCTL_REGISTER_PMEM \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
+
+#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
+
+#define MSM_CAM_IOCTL_CTRL_COMMAND \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
+
+#define MSM_CAM_IOCTL_CONFIG_VFE \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
+
+#define MSM_CAM_IOCTL_GET_STATS \
+ _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
+
+#define MSM_CAM_IOCTL_GETFRAME \
+ _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
+
+#define MSM_CAM_IOCTL_ENABLE_VFE \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
+
+#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
+
+#define MSM_CAM_IOCTL_CONFIG_CMD \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
+
+#define MSM_CAM_IOCTL_DISABLE_VFE \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
+
+#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
+
+#define MSM_CAM_IOCTL_VFE_APPS_RESET \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
+
+#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
+
+#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
+
+#define MSM_CAM_IOCTL_AXI_CONFIG \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
+
+#define MSM_CAM_IOCTL_GET_PICTURE \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *)
+
+#define MSM_CAM_IOCTL_SET_CROP \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
+
+#define MSM_CAM_IOCTL_PICT_PP \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
+
+#define MSM_CAM_IOCTL_PICT_PP_DONE \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
+
+#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
+
+#define MSM_CAM_IOCTL_FLASH_LED_CFG \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
+
+#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
+ _IO(MSM_CAM_IOCTL_MAGIC, 23)
+
+#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
+
+#define MSM_CAM_IOCTL_AF_CTRL \
+ _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *)
+
+#define MSM_CAM_IOCTL_AF_CTRL_DONE \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *)
+
+#define MSM_CAM_IOCTL_CONFIG_VPE \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *)
+
+#define MSM_CAM_IOCTL_AXI_VPE_CONFIG \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *)
+
+#define MSM_CAM_IOCTL_STROBE_FLASH_CFG \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *)
+
+#define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *)
+
+#define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \
+ _IO(MSM_CAM_IOCTL_MAGIC, 31)
+
+#define MSM_CAM_IOCTL_FLASH_CTRL \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *)
+
+#define MSM_CAM_IOCTL_ERROR_CONFIG \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *)
+
+#define MSM_CAM_IOCTL_ABORT_CAPTURE \
+ _IO(MSM_CAM_IOCTL_MAGIC, 34)
+
+#define MSM_CAM_IOCTL_SET_FD_ROI \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *)
+
+#define MSM_CAM_IOCTL_GET_CAMERA_INFO \
+ _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *)
+
+#define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \
+ _IO(MSM_CAM_IOCTL_MAGIC, 37)
+
+#define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *)
+
+#define MSM_CAM_IOCTL_PUT_ST_FRAME \
+ _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *)
+
+#define MSM_CAM_IOCTL_GET_CONFIG_INFO \
+ _IOR(MSM_CAM_IOCTL_MAGIC, 40, struct msm_cam_config_dev_info *)
+
+#define MSM_CAMERA_LED_OFF 0
+#define MSM_CAMERA_LED_LOW 1
+#define MSM_CAMERA_LED_HIGH 2
+
+#define MSM_CAMERA_STROBE_FLASH_NONE 0
+#define MSM_CAMERA_STROBE_FLASH_XENON 1
+
+#define MSM_MAX_CAMERA_SENSORS 5
+#define MAX_SENSOR_NAME 32
+
+#define MSM_MAX_CAMERA_CONFIGS 2
+
+#define PP_SNAP 0x01
+#define PP_RAW_SNAP ((0x01)<<1)
+#define PP_PREV ((0x01)<<2)
+#define PP_MASK (PP_SNAP|PP_RAW_SNAP|PP_PREV)
+
+#define MSM_CAM_CTRL_CMD_DONE 0
+#define MSM_CAM_SENSOR_VFE_CMD 1
+
+/*****************************************************
+ * structure
+ *****************************************************/
+
+/* define five type of structures for userspace <==> kernel
+ * space communication:
+ * command 1 - 2 are from userspace ==> kernel
+ * command 3 - 4 are from kernel ==> userspace
+ *
+ * 1. control command: control command(from control thread),
+ * control status (from config thread);
+ */
+struct msm_ctrl_cmd {
+ uint16_t type;
+ uint16_t length;
+ void *value;
+ uint16_t status;
+ uint32_t timeout_ms;
+ int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
+ int vnode_id; /* video dev id. Can we overload resp_fd? */
+ uint32_t stream_type; /* used to pass value to qcamera server */
+};
+
+struct msm_cam_evt_msg {
+ unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */
+ unsigned short msg_id;
+ unsigned int len; /* size in, number of bytes out */
+ uint32_t frame_id;
+ void *data;
+};
+
+struct msm_isp_stats_event_ctrl {
+ unsigned short resptype;
+ union {
+ struct msm_cam_evt_msg isp_msg;
+ struct msm_ctrl_cmd ctrl;
+ } isp_data;
+};
+
+#define MSM_CAM_RESP_CTRL 0
+#define MSM_CAM_RESP_STAT_EVT_MSG 1
+#define MSM_CAM_RESP_STEREO_OP_1 2
+#define MSM_CAM_RESP_STEREO_OP_2 3
+#define MSM_CAM_RESP_V4L2 4
+#define MSM_CAM_RESP_MAX 5
+
+/* driver event types */
+#define MSM_CAM_EVT_HISTOGRAM_NOTIFY (V4L2_EVENT_PRIVATE_START+1)
+#define MSM_CAM_EVT_STREAMING_NOTIFY (V4L2_EVENT_PRIVATE_START+2)
+#define MSM_CAM_EVT_ASYNC_CMD_NOTIFY (V4L2_EVENT_PRIVATE_START+3)
+#define MSM_CAM_EVT_CNT_MAX 3
+
+struct msm_event_histogram {
+ int32_t fd;
+ uint32_t size;
+ uint32_t offset;
+};
+struct msm_event_async_cmd_status {
+ uint32_t cmd;
+ int32_t status;
+};
+struct msm_event_streaming_status {
+ uint32_t ext_mode;
+ int32_t streamon;
+ int32_t status;
+};
+struct msm_event_payload {
+ uint32_t type;
+ union {
+ struct msm_event_histogram hist;
+ struct msm_event_async_cmd_status cmd_status;
+ struct msm_event_streaming_status stream_status;
+ };
+};
+/* this one is used to send ctrl/status up to config thread */
+struct msm_stats_event_ctrl {
+ /* 0 - ctrl_cmd from control thread,
+ * 1 - stats/event kernel,
+ * 2 - V4L control or read request */
+ int resptype;
+ int timeout_ms;
+ struct msm_ctrl_cmd ctrl_cmd;
+ /* struct vfe_event_t stats_event; */
+ struct msm_cam_evt_msg stats_event;
+};
+
+/* 2. config command: config command(from config thread); */
+struct msm_camera_cfg_cmd {
+ /* what to config:
+ * 1 - sensor config, 2 - vfe config */
+ uint16_t cfg_type;
+
+ /* sensor config type */
+ uint16_t cmd_type;
+ uint16_t queue;
+ uint16_t length;
+ void *value;
+};
+
+#define CMD_GENERAL 0
+#define CMD_AXI_CFG_OUT1 1
+#define CMD_AXI_CFG_SNAP_O1_AND_O2 2
+#define CMD_AXI_CFG_OUT2 3
+#define CMD_PICT_T_AXI_CFG 4
+#define CMD_PICT_M_AXI_CFG 5
+#define CMD_RAW_PICT_AXI_CFG 6
+
+#define CMD_FRAME_BUF_RELEASE 7
+#define CMD_PREV_BUF_CFG 8
+#define CMD_SNAP_BUF_RELEASE 9
+#define CMD_SNAP_BUF_CFG 10
+#define CMD_STATS_DISABLE 11
+#define CMD_STATS_AEC_AWB_ENABLE 12
+#define CMD_STATS_AF_ENABLE 13
+#define CMD_STATS_AEC_ENABLE 14
+#define CMD_STATS_AWB_ENABLE 15
+#define CMD_STATS_ENABLE 16
+
+#define CMD_STATS_AXI_CFG 17
+#define CMD_STATS_AEC_AXI_CFG 18
+#define CMD_STATS_AF_AXI_CFG 19
+#define CMD_STATS_AWB_AXI_CFG 20
+#define CMD_STATS_RS_AXI_CFG 21
+#define CMD_STATS_CS_AXI_CFG 22
+#define CMD_STATS_IHIST_AXI_CFG 23
+#define CMD_STATS_SKIN_AXI_CFG 24
+
+#define CMD_STATS_BUF_RELEASE 25
+#define CMD_STATS_AEC_BUF_RELEASE 26
+#define CMD_STATS_AF_BUF_RELEASE 27
+#define CMD_STATS_AWB_BUF_RELEASE 28
+#define CMD_STATS_RS_BUF_RELEASE 29
+#define CMD_STATS_CS_BUF_RELEASE 30
+#define CMD_STATS_IHIST_BUF_RELEASE 31
+#define CMD_STATS_SKIN_BUF_RELEASE 32
+
+#define UPDATE_STATS_INVALID 33
+#define CMD_AXI_CFG_SNAP_GEMINI 34
+#define CMD_AXI_CFG_SNAP 35
+#define CMD_AXI_CFG_PREVIEW 36
+#define CMD_AXI_CFG_VIDEO 37
+
+#define CMD_STATS_IHIST_ENABLE 38
+#define CMD_STATS_RS_ENABLE 39
+#define CMD_STATS_CS_ENABLE 40
+#define CMD_VPE 41
+#define CMD_AXI_CFG_VPE 42
+#define CMD_AXI_CFG_ZSL 43
+#define CMD_AXI_CFG_SNAP_VPE 44
+#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
+
+/* vfe config command: config command(from config thread)*/
+struct msm_vfe_cfg_cmd {
+ int cmd_type;
+ uint16_t length;
+ void *value;
+};
+
+struct msm_vpe_cfg_cmd {
+ int cmd_type;
+ uint16_t length;
+ void *value;
+};
+
+#define MAX_CAMERA_ENABLE_NAME_LEN 32
+struct camera_enable_cmd {
+ char name[MAX_CAMERA_ENABLE_NAME_LEN];
+};
+
+#define MSM_PMEM_OUTPUT1 0
+#define MSM_PMEM_OUTPUT2 1
+#define MSM_PMEM_OUTPUT1_OUTPUT2 2
+#define MSM_PMEM_THUMBNAIL 3
+#define MSM_PMEM_MAINIMG 4
+#define MSM_PMEM_RAW_MAINIMG 5
+#define MSM_PMEM_AEC_AWB 6
+#define MSM_PMEM_AF 7
+#define MSM_PMEM_AEC 8
+#define MSM_PMEM_AWB 9
+#define MSM_PMEM_RS 10
+#define MSM_PMEM_CS 11
+#define MSM_PMEM_IHIST 12
+#define MSM_PMEM_SKIN 13
+#define MSM_PMEM_VIDEO 14
+#define MSM_PMEM_PREVIEW 15
+#define MSM_PMEM_VIDEO_VPE 16
+#define MSM_PMEM_C2D 17
+#define MSM_PMEM_MAINIMG_VPE 18
+#define MSM_PMEM_THUMBNAIL_VPE 19
+#define MSM_PMEM_MAX 20
+
+#define STAT_AEAW 0
+#define STAT_AEC 1
+#define STAT_AF 2
+#define STAT_AWB 3
+#define STAT_RS 4
+#define STAT_CS 5
+#define STAT_IHIST 6
+#define STAT_SKIN 7
+#define STAT_MAX 8
+
+#define FRAME_PREVIEW_OUTPUT1 0
+#define FRAME_PREVIEW_OUTPUT2 1
+#define FRAME_SNAPSHOT 2
+#define FRAME_THUMBNAIL 3
+#define FRAME_RAW_SNAPSHOT 4
+#define FRAME_MAX 5
+
+struct msm_pmem_info {
+ int type;
+ int fd;
+ void *vaddr;
+ uint32_t offset;
+ uint32_t len;
+ uint32_t y_off;
+ uint32_t cbcr_off;
+ uint8_t active;
+};
+
+struct outputCfg {
+ uint32_t height;
+ uint32_t width;
+
+ uint32_t window_height_firstline;
+ uint32_t window_height_lastline;
+};
+
+#define OUTPUT_1 0
+#define OUTPUT_2 1
+#define OUTPUT_1_AND_2 2 /* snapshot only */
+#define OUTPUT_1_AND_3 3 /* video */
+#define CAMIF_TO_AXI_VIA_OUTPUT_2 4
+#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
+#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
+#define OUTPUT_1_2_AND_3 7
+#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_1_2_AND_3 7
+
+#define MSM_FRAME_PREV_1 0
+#define MSM_FRAME_PREV_2 1
+#define MSM_FRAME_ENC 2
+
+#define OUTPUT_TYPE_P (1<<0)
+#define OUTPUT_TYPE_T (1<<1)
+#define OUTPUT_TYPE_S (1<<2)
+#define OUTPUT_TYPE_V (1<<3)
+#define OUTPUT_TYPE_L (1<<4)
+#define OUTPUT_TYPE_ST_L (1<<5)
+#define OUTPUT_TYPE_ST_R (1<<6)
+#define OUTPUT_TYPE_ST_D (1<<7)
+
+struct fd_roi_info {
+ void *info;
+ int info_len;
+};
+
+struct msm_frame {
+ struct timespec ts;
+ int path;
+ int type;
+ unsigned long buffer;
+ uint32_t phy_offset;
+ uint32_t y_off;
+ uint32_t cbcr_off;
+ int fd;
+
+ void *cropinfo;
+ int croplen;
+ uint32_t error_code;
+ struct fd_roi_info roi_info;
+ uint32_t frame_id;
+ int stcam_quality_ind;
+ uint32_t stcam_conv_value;
+};
+
+enum msm_st_frame_packing {
+ SIDE_BY_SIDE_HALF,
+ SIDE_BY_SIDE_FULL,
+ TOP_DOWN_HALF,
+ TOP_DOWN_FULL,
+};
+
+struct msm_st_crop {
+ uint32_t in_w;
+ uint32_t in_h;
+ uint32_t out_w;
+ uint32_t out_h;
+};
+
+struct msm_st_half {
+ uint32_t buf_y_off;
+ uint32_t buf_cbcr_off;
+ uint32_t buf_y_stride;
+ uint32_t buf_cbcr_stride;
+ uint32_t pix_x_off;
+ uint32_t pix_y_off;
+ struct msm_st_crop stCropInfo;
+};
+
+struct msm_st_frame {
+ struct msm_frame buf_info;
+ int type;
+ enum msm_st_frame_packing packing;
+ struct msm_st_half L;
+ struct msm_st_half R;
+ int frame_id;
+};
+
+#define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1)
+
+struct stats_buff {
+ unsigned long buff;
+ int fd;
+};
+
+struct msm_stats_buf {
+ struct stats_buff aec;
+ struct stats_buff awb;
+ struct stats_buff af;
+ struct stats_buff ihist;
+ struct stats_buff rs;
+ struct stats_buff cs;
+ struct stats_buff skin;
+ int type;
+ uint32_t status_bits;
+ unsigned long buffer;
+ int fd;
+ uint32_t frame_id;
+};
+#define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0
+/* video capture mode in VIDIOC_S_PARM */
+#define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \
+ (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1)
+/* extendedmode for video recording in VIDIOC_S_PARM */
+#define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \
+ (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2)
+/* extendedmode for the full size main image in VIDIOC_S_PARM */
+#define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3)
+/* extendedmode for the thumb nail image in VIDIOC_S_PARM */
+#define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \
+ (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4)
+#define MSM_V4L2_EXT_CAPTURE_MODE_RAW \
+ (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5)
+#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6)
+
+
+#define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE
+#define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1)
+#define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE+2)
+#define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE+3)
+#define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE+4)
+#define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE+5)
+#define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE+6)
+#define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE+7)
+#define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE+8)
+#define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE+9)
+#define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE+10)
+#define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE+11)
+#define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE+12)
+#define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE+13)
+#define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE+14)
+#define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE+15)
+#define MSM_V4L2_PID_MAX MSM_V4L2_PID_STROBE_FLASH
+
+/* camera operation mode for video recording - two frame output queues */
+#define MSM_V4L2_CAM_OP_DEFAULT 0
+/* camera operation mode for video recording - two frame output queues */
+#define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT+1)
+/* camera operation mode for video recording - two frame output queues */
+#define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT+2)
+/* camera operation mode for standard shapshot - two frame output queues */
+#define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+3)
+/* camera operation mode for zsl shapshot - three output queues */
+#define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT+4)
+/* camera operation mode for raw snapshot - one frame output queue */
+#define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT+5)
+
+#define MSM_V4L2_VID_CAP_TYPE 0
+#define MSM_V4L2_STREAM_ON 1
+#define MSM_V4L2_STREAM_OFF 2
+#define MSM_V4L2_SNAPSHOT 3
+#define MSM_V4L2_QUERY_CTRL 4
+#define MSM_V4L2_GET_CTRL 5
+#define MSM_V4L2_SET_CTRL 6
+#define MSM_V4L2_QUERY 7
+#define MSM_V4L2_GET_CROP 8
+#define MSM_V4L2_SET_CROP 9
+#define MSM_V4L2_OPEN 10
+#define MSM_V4L2_CLOSE 11
+#define MSM_V4L2_SET_CTRL_CMD 12
+#define MSM_V4L2_EVT_SUB_MASK 13
+#define MSM_V4L2_MAX 14
+#define V4L2_CAMERA_EXIT 43
+
+struct crop_info {
+ void *info;
+ int len;
+};
+
+struct msm_postproc {
+ int ftnum;
+ struct msm_frame fthumnail;
+ int fmnum;
+ struct msm_frame fmain;
+};
+
+struct msm_snapshot_pp_status {
+ void *status;
+};
+
+#define CFG_SET_MODE 0
+#define CFG_SET_EFFECT 1
+#define CFG_START 2
+#define CFG_PWR_UP 3
+#define CFG_PWR_DOWN 4
+#define CFG_WRITE_EXPOSURE_GAIN 5
+#define CFG_SET_DEFAULT_FOCUS 6
+#define CFG_MOVE_FOCUS 7
+#define CFG_REGISTER_TO_REAL_GAIN 8
+#define CFG_REAL_TO_REGISTER_GAIN 9
+#define CFG_SET_FPS 10
+#define CFG_SET_PICT_FPS 11
+#define CFG_SET_BRIGHTNESS 12
+#define CFG_SET_CONTRAST 13
+#define CFG_SET_ZOOM 14
+#define CFG_SET_EXPOSURE_MODE 15
+#define CFG_SET_WB 16
+#define CFG_SET_ANTIBANDING 17
+#define CFG_SET_EXP_GAIN 18
+#define CFG_SET_PICT_EXP_GAIN 19
+#define CFG_SET_LENS_SHADING 20
+#define CFG_GET_PICT_FPS 21
+#define CFG_GET_PREV_L_PF 22
+#define CFG_GET_PREV_P_PL 23
+#define CFG_GET_PICT_L_PF 24
+#define CFG_GET_PICT_P_PL 25
+#define CFG_GET_AF_MAX_STEPS 26
+#define CFG_GET_PICT_MAX_EXP_LC 27
+#define CFG_SEND_WB_INFO 28
+#define CFG_SENSOR_INIT 29
+#define CFG_GET_3D_CALI_DATA 30
+#define CFG_GET_CALIB_DATA 31
+#define CFG_MAX 32
+
+
+#define MOVE_NEAR 0
+#define MOVE_FAR 1
+
+#define SENSOR_PREVIEW_MODE 0
+#define SENSOR_SNAPSHOT_MODE 1
+#define SENSOR_RAW_SNAPSHOT_MODE 2
+#define SENSOR_HFR_60FPS_MODE 3
+#define SENSOR_HFR_90FPS_MODE 4
+#define SENSOR_HFR_120FPS_MODE 5
+
+#define SENSOR_QTR_SIZE 0
+#define SENSOR_FULL_SIZE 1
+#define SENSOR_QVGA_SIZE 2
+#define SENSOR_INVALID_SIZE 3
+
+#define CAMERA_EFFECT_OFF 0
+#define CAMERA_EFFECT_MONO 1
+#define CAMERA_EFFECT_NEGATIVE 2
+#define CAMERA_EFFECT_SOLARIZE 3
+#define CAMERA_EFFECT_SEPIA 4
+#define CAMERA_EFFECT_POSTERIZE 5
+#define CAMERA_EFFECT_WHITEBOARD 6
+#define CAMERA_EFFECT_BLACKBOARD 7
+#define CAMERA_EFFECT_AQUA 8
+#define CAMERA_EFFECT_MAX 9
+
+struct sensor_pict_fps {
+ uint16_t prevfps;
+ uint16_t pictfps;
+};
+
+struct exp_gain_cfg {
+ uint16_t gain;
+ uint32_t line;
+};
+
+struct focus_cfg {
+ int32_t steps;
+ int dir;
+};
+
+struct fps_cfg {
+ uint16_t f_mult;
+ uint16_t fps_div;
+ uint32_t pict_fps_div;
+};
+struct wb_info_cfg {
+ uint16_t red_gain;
+ uint16_t green_gain;
+ uint16_t blue_gain;
+};
+struct sensor_3d_exp_cfg {
+ uint16_t gain;
+ uint32_t line;
+ uint16_t r_gain;
+ uint16_t b_gain;
+ uint16_t gr_gain;
+ uint16_t gb_gain;
+ uint16_t gain_adjust;
+};
+struct sensor_3d_cali_data_t{
+ unsigned char left_p_matrix[3][4][8];
+ unsigned char right_p_matrix[3][4][8];
+ unsigned char square_len[8];
+ unsigned char focal_len[8];
+ unsigned char pixel_pitch[8];
+ uint16_t left_r;
+ uint16_t left_b;
+ uint16_t left_gb;
+ uint16_t left_af_far;
+ uint16_t left_af_mid;
+ uint16_t left_af_short;
+ uint16_t left_af_5um;
+ uint16_t left_af_50up;
+ uint16_t left_af_50down;
+ uint16_t right_r;
+ uint16_t right_b;
+ uint16_t right_gb;
+ uint16_t right_af_far;
+ uint16_t right_af_mid;
+ uint16_t right_af_short;
+ uint16_t right_af_5um;
+ uint16_t right_af_50up;
+ uint16_t right_af_50down;
+};
+struct sensor_init_cfg {
+ uint8_t prev_res;
+ uint8_t pict_res;
+};
+
+struct sensor_calib_data {
+ /* Color Related Measurements */
+ uint16_t r_over_g;
+ uint16_t b_over_g;
+ uint16_t gr_over_gb;
+
+ /* Lens Related Measurements */
+ uint16_t macro_2_inf;
+ uint16_t inf_2_macro;
+ uint16_t stroke_amt;
+ uint16_t af_pos_1m;
+ uint16_t af_pos_inf;
+};
+
+struct sensor_cfg_data {
+ int cfgtype;
+ int mode;
+ int rs;
+ uint8_t max_steps;
+
+ union {
+ int8_t effect;
+ uint8_t lens_shading;
+ uint16_t prevl_pf;
+ uint16_t prevp_pl;
+ uint16_t pictl_pf;
+ uint16_t pictp_pl;
+ uint32_t pict_max_exp_lc;
+ uint16_t p_fps;
+ struct sensor_init_cfg init_info;
+ struct sensor_pict_fps gfps;
+ struct exp_gain_cfg exp_gain;
+ struct focus_cfg focus;
+ struct fps_cfg fps;
+ struct wb_info_cfg wb_info;
+ struct sensor_3d_exp_cfg sensor_3d_exp;
+ struct sensor_calib_data calib_info;
+ } cfg;
+};
+
+struct sensor_large_data {
+ int cfgtype;
+ union {
+ struct sensor_3d_cali_data_t sensor_3d_cali_data;
+ } data;
+};
+
+enum sensor_type_t {
+ BAYER,
+ YUV,
+ JPEG_SOC,
+};
+
+enum flash_type {
+ LED_FLASH,
+ STROBE_FLASH,
+};
+
+enum strobe_flash_ctrl_type {
+ STROBE_FLASH_CTRL_INIT,
+ STROBE_FLASH_CTRL_CHARGE,
+ STROBE_FLASH_CTRL_RELEASE
+};
+
+struct strobe_flash_ctrl_data {
+ enum strobe_flash_ctrl_type type;
+ int charge_en;
+};
+
+struct msm_camera_info {
+ int num_cameras;
+ uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS];
+ uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS];
+ uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
+ const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
+ enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
+
+};
+
+struct msm_cam_config_dev_info {
+ int num_config_nodes;
+ const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS];
+};
+
+struct flash_ctrl_data {
+ int flashtype;
+ union {
+ int led_state;
+ struct strobe_flash_ctrl_data strobe_ctrl;
+ } ctrl_data;
+};
+
+#define GET_NAME 0
+#define GET_PREVIEW_LINE_PER_FRAME 1
+#define GET_PREVIEW_PIXELS_PER_LINE 2
+#define GET_SNAPSHOT_LINE_PER_FRAME 3
+#define GET_SNAPSHOT_PIXELS_PER_LINE 4
+#define GET_SNAPSHOT_FPS 5
+#define GET_SNAPSHOT_MAX_EP_LINE_CNT 6
+
+struct msm_camsensor_info {
+ char name[MAX_SENSOR_NAME];
+ uint8_t flash_enabled;
+ int8_t total_steps;
+ uint8_t support_3d;
+};
+#endif /* __LINUX_MSM_CAMERA_H */
diff --git a/include/media/msm_gemini.h b/include/media/msm_gemini.h
new file mode 100644
index 0000000..0167335
--- /dev/null
+++ b/include/media/msm_gemini.h
@@ -0,0 +1,114 @@
+#ifndef __LINUX_MSM_GEMINI_H
+#define __LINUX_MSM_GEMINI_H
+
+#include <linux/types.h>
+#include <linux/ioctl.h>
+
+#define MSM_GMN_IOCTL_MAGIC 'g'
+
+#define MSM_GMN_IOCTL_GET_HW_VERSION \
+ _IOW(MSM_GMN_IOCTL_MAGIC, 1, struct msm_gemini_hw_cmd *)
+
+#define MSM_GMN_IOCTL_RESET \
+ _IOW(MSM_GMN_IOCTL_MAGIC, 2, struct msm_gemini_ctrl_cmd *)
+
+#define MSM_GMN_IOCTL_STOP \
+ _IOW(MSM_GMN_IOCTL_MAGIC, 3, struct msm_gemini_hw_cmds *)
+
+#define MSM_GMN_IOCTL_START \
+ _IOW(MSM_GMN_IOCTL_MAGIC, 4, struct msm_gemini_hw_cmds *)
+
+#define MSM_GMN_IOCTL_INPUT_BUF_ENQUEUE \
+ _IOW(MSM_GMN_IOCTL_MAGIC, 5, struct msm_gemini_buf *)
+
+#define MSM_GMN_IOCTL_INPUT_GET \
+ _IOW(MSM_GMN_IOCTL_MAGIC, 6, struct msm_gemini_buf *)
+
+#define MSM_GMN_IOCTL_INPUT_GET_UNBLOCK \
+ _IOW(MSM_GMN_IOCTL_MAGIC, 7, int)
+
+#define MSM_GMN_IOCTL_OUTPUT_BUF_ENQUEUE \
+ _IOW(MSM_GMN_IOCTL_MAGIC, 8, struct msm_gemini_buf *)
+
+#define MSM_GMN_IOCTL_OUTPUT_GET \
+ _IOW(MSM_GMN_IOCTL_MAGIC, 9, struct msm_gemini_buf *)
+
+#define MSM_GMN_IOCTL_OUTPUT_GET_UNBLOCK \
+ _IOW(MSM_GMN_IOCTL_MAGIC, 10, int)
+
+#define MSM_GMN_IOCTL_EVT_GET \
+ _IOW(MSM_GMN_IOCTL_MAGIC, 11, struct msm_gemini_ctrl_cmd *)
+
+#define MSM_GMN_IOCTL_EVT_GET_UNBLOCK \
+ _IOW(MSM_GMN_IOCTL_MAGIC, 12, int)
+
+#define MSM_GMN_IOCTL_HW_CMD \
+ _IOW(MSM_GMN_IOCTL_MAGIC, 13, struct msm_gemini_hw_cmd *)
+
+#define MSM_GMN_IOCTL_HW_CMDS \
+ _IOW(MSM_GMN_IOCTL_MAGIC, 14, struct msm_gemini_hw_cmds *)
+
+#define MSM_GMN_IOCTL_TEST_DUMP_REGION \
+ _IOW(MSM_GMN_IOCTL_MAGIC, 15, unsigned long)
+
+#define MSM_GEMINI_MODE_REALTIME_ENCODE 0
+#define MSM_GEMINI_MODE_OFFLINE_ENCODE 1
+#define MSM_GEMINI_MODE_REALTIME_ROTATION 2
+#define MSM_GEMINI_MODE_OFFLINE_ROTATION 3
+struct msm_gemini_ctrl_cmd {
+ uint32_t type;
+ uint32_t len;
+ void *value;
+};
+
+#define MSM_GEMINI_EVT_RESET 0
+#define MSM_GEMINI_EVT_FRAMEDONE 1
+#define MSM_GEMINI_EVT_ERR 2
+
+struct msm_gemini_buf {
+ uint32_t type;
+ int fd;
+
+ void *vaddr;
+
+ uint32_t y_off;
+ uint32_t y_len;
+ uint32_t framedone_len;
+
+ uint32_t cbcr_off;
+ uint32_t cbcr_len;
+
+ uint32_t num_of_mcu_rows;
+ uint32_t offset;
+};
+
+#define MSM_GEMINI_HW_CMD_TYPE_READ 0
+#define MSM_GEMINI_HW_CMD_TYPE_WRITE 1
+#define MSM_GEMINI_HW_CMD_TYPE_WRITE_OR 2
+#define MSM_GEMINI_HW_CMD_TYPE_UWAIT 3
+#define MSM_GEMINI_HW_CMD_TYPE_MWAIT 4
+#define MSM_GEMINI_HW_CMD_TYPE_MDELAY 5
+#define MSM_GEMINI_HW_CMD_TYPE_UDELAY 6
+struct msm_gemini_hw_cmd {
+
+ uint32_t type:4;
+
+ /* n microseconds of timeout for WAIT */
+ /* n microseconds of time for DELAY */
+ /* repeat n times for READ/WRITE */
+ /* max is 0xFFF, 4095 */
+ uint32_t n:12;
+ uint32_t offset:16;
+ uint32_t mask;
+ union {
+ uint32_t data; /* for single READ/WRITE/WAIT, n = 1 */
+ uint32_t *pdata; /* for multiple READ/WRITE/WAIT, n > 1 */
+ };
+};
+
+struct msm_gemini_hw_cmds {
+ uint32_t m; /* number of elements in the hw_cmd array */
+ struct msm_gemini_hw_cmd hw_cmd[1];
+};
+
+#endif /* __LINUX_MSM_GEMINI_H */
diff --git a/include/media/radio-iris.h b/include/media/radio-iris.h
new file mode 100644
index 0000000..9bb2d89
--- /dev/null
+++ b/include/media/radio-iris.h
@@ -0,0 +1,558 @@
+/*
+ *
+ * Copyright (c) 2011 Code Aurora Forum. All rights reserved.
+ *
+ * This file is based on include/net/bluetooth/hci_core.h
+ *
+ * Written 2000,2001 by Maxim Krasnyansky <maxk@qualcomm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation;
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF THIRD PARTY RIGHTS.
+ * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) AND AUTHOR(S) BE LIABLE FOR ANY
+ * CLAIM, OR ANY SPECIAL INDIRECT OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ * ALL LIABILITY, INCLUDING LIABILITY FOR INFRINGEMENT OF ANY PATENTS,
+ * COPYRIGHTS, TRADEMARKS OR OTHER RIGHTS, RELATING TO USE OF THIS
+ * SOFTWARE IS DISCLAIMED.
+ */
+
+#ifndef __RADIO_HCI_CORE_H
+#define __RADIO_HCI_CORE_H
+
+#include <linux/skbuff.h>
+#include <linux/interrupt.h>
+#include <linux/mutex.h>
+#include <linux/atomic.h>
+
+/* ---- HCI Packet structures ---- */
+#define RADIO_HCI_COMMAND_HDR_SIZE sizeof(struct radio_hci_command_hdr)
+#define RADIO_HCI_EVENT_HDR_SIZE sizeof(struct radio_hci_event_hdr)
+
+/* HCI data types */
+#define RADIO_HCI_COMMAND_PKT 0x11
+#define RADIO_HCI_EVENT_PKT 0x14
+
+/* HCI timeouts */
+#define RADIO_HCI_TIMEOUT (10000) /* 10 seconds */
+
+#define TUNE_PARAM 16
+struct radio_hci_command_hdr {
+ __le16 opcode; /* OCF & OGF */
+ __u8 plen;
+} __packed;
+
+struct radio_hci_event_hdr {
+ __u8 evt;
+ __u8 plen;
+} __packed;
+
+struct radio_hci_dev {
+ char name[8];
+ unsigned long flags;
+ __u16 id;
+ __u8 bus;
+ __u8 dev_type;
+ __u8 dev_name[248];
+ __u8 dev_class[3];
+ __u8 features[8];
+ __u8 commands[64];
+
+ unsigned int data_block_len;
+ unsigned long cmd_last_tx;
+
+ struct sk_buff *sent_cmd;
+
+ __u32 req_status;
+ __u32 req_result;
+ atomic_t cmd_cnt;
+
+ struct tasklet_struct cmd_task;
+ struct tasklet_struct rx_task;
+ struct tasklet_struct tx_task;
+
+ struct sk_buff_head rx_q;
+ struct sk_buff_head raw_q;
+ struct sk_buff_head cmd_q;
+
+ struct mutex req_lock;
+ wait_queue_head_t req_wait_q;
+
+ int (*open)(struct radio_hci_dev *hdev);
+ int (*close)(struct radio_hci_dev *hdev);
+ int (*flush)(struct radio_hci_dev *hdev);
+ int (*send)(struct sk_buff *skb);
+ void (*destruct)(struct radio_hci_dev *hdev);
+ void (*notify)(struct radio_hci_dev *hdev, unsigned int evt);
+};
+
+int radio_hci_register_dev(struct radio_hci_dev *hdev);
+int radio_hci_unregister_dev(struct radio_hci_dev *hdev);
+int radio_hci_recv_frame(struct sk_buff *skb);
+int radio_hci_send_cmd(struct radio_hci_dev *hdev, __u16 opcode, __u32 plen,
+ void *param);
+void radio_hci_event_packet(struct radio_hci_dev *hdev, struct sk_buff *skb);
+
+/* Opcode OCF */
+/* HCI recv control commands opcode */
+#define HCI_OCF_FM_ENABLE_RECV_REQ 0x0001
+#define HCI_OCF_FM_DISABLE_RECV_REQ 0x0002
+#define HCI_OCF_FM_GET_RECV_CONF_REQ 0x0003
+#define HCI_OCF_FM_SET_RECV_CONF_REQ 0x0004
+#define HCI_OCF_FM_SET_MUTE_MODE_REQ 0x0005
+#define HCI_OCF_FM_SET_STEREO_MODE_REQ 0x0006
+#define HCI_OCF_FM_SET_ANTENNA 0x0007
+#define HCI_OCF_FM_SET_SIGNAL_THRESHOLD 0x0008
+#define HCI_OCF_FM_GET_SIGNAL_THRESHOLD 0x0009
+#define HCI_OCF_FM_GET_STATION_PARAM_REQ 0x000A
+#define HCI_OCF_FM_GET_PROGRAM_SERVICE_REQ 0x000B
+#define HCI_OCF_FM_GET_RADIO_TEXT_REQ 0x000C
+#define HCI_OCF_FM_GET_AF_LIST_REQ 0x000D
+#define HCI_OCF_FM_SEARCH_STATIONS 0x000E
+#define HCI_OCF_FM_SEARCH_RDS_STATIONS 0x000F
+#define HCI_OCF_FM_SEARCH_STATIONS_LIST 0x0010
+#define HCI_OCF_FM_CANCEL_SEARCH 0x0011
+#define HCI_OCF_FM_RDS_GRP 0x0012
+#define HCI_OCF_FM_RDS_GRP_PROCESS 0x0013
+#define HCI_OCF_FM_EN_WAN_AVD_CTRL 0x0014
+#define HCI_OCF_FM_EN_NOTCH_CTRL 0x0015
+
+/* HCI common control commands opcode */
+#define HCI_OCF_FM_TUNE_STATION_REQ 0x0001
+#define HCI_OCF_FM_DEFAULT_DATA_READ 0x0002
+#define HCI_OCF_FM_DEFAULT_DATA_WRITE 0x0003
+#define HCI_OCF_FM_RESET 0x0004
+#define HCI_OCF_FM_GET_FEATURE_LIST 0x0005
+#define HCI_OCF_FM_DO_CALIBRATION 0x0006
+
+/*HCI Status parameters commands*/
+#define HCI_OCF_FM_READ_GRP_COUNTERS 0x0001
+
+/*HCI Diagnostic commands*/
+#define HCI_OCF_FM_PEEK_DATA 0x0002
+#define HCI_OCF_FM_POKE_DATA 0x0003
+#define HCI_OCF_FM_SSBI_PEEK_REG 0x0004
+#define HCI_OCF_FM_SSBI_POKE_REG 0x0005
+#define HCI_OCF_FM_STATION_DBG_PARAM 0x0007
+
+/* Opcode OGF */
+#define HCI_OGF_FM_RECV_CTRL_CMD_REQ 0x0013
+#define HCI_OGF_FM_COMMON_CTRL_CMD_REQ 0x0015
+#define HCI_OGF_FM_STATUS_PARAMETERS_CMD_REQ 0x0016
+#define HCI_OGF_FM_TEST_CMD_REQ 0x0017
+#define HCI_OGF_FM_DIAGNOSTIC_CMD_REQ 0x003F
+
+/* Command opcode pack/unpack */
+#define hci_opcode_pack(ogf, ocf) (__u16) ((ocf & 0x03ff)|(ogf << 10))
+#define hci_opcode_ogf(op) (op >> 10)
+#define hci_opcode_ocf(op) (op & 0x03ff)
+#define hci_recv_ctrl_cmd_op_pack(ocf) \
+ (__u16) hci_opcode_pack(HCI_OGF_FM_RECV_CTRL_CMD_REQ, ocf)
+#define hci_common_cmd_op_pack(ocf) \
+ (__u16) hci_opcode_pack(HCI_OGF_FM_COMMON_CTRL_CMD_REQ, ocf)
+#define hci_status_param_op_pack(ocf) \
+ (__u16) hci_opcode_pack(HCI_OGF_FM_STATUS_PARAMETERS_CMD_REQ, ocf)
+#define hci_diagnostic_cmd_op_pack(ocf) \
+ (__u16) hci_opcode_pack(HCI_OGF_FM_DIAGNOSTIC_CMD_REQ, ocf)
+
+
+/* HCI commands with no arguments*/
+#define HCI_FM_ENABLE_RECV_CMD 1
+#define HCI_FM_DISABLE_RECV_CMD 2
+#define HCI_FM_GET_RECV_CONF_CMD 3
+#define HCI_FM_GET_STATION_PARAM_CMD 4
+#define HCI_FM_GET_SIGNAL_TH_CMD 5
+#define HCI_FM_GET_PROGRAM_SERVICE_CMD 6
+#define HCI_FM_GET_RADIO_TEXT_CMD 7
+#define HCI_FM_GET_AF_LIST_CMD 8
+#define HCI_FM_CANCEL_SEARCH_CMD 9
+#define HCI_FM_RESET_CMD 10
+#define HCI_FM_GET_FEATURES_CMD 11
+#define HCI_FM_STATION_DBG_PARAM_CMD 12
+
+/* ----- HCI Command request ----- */
+struct hci_fm_recv_conf_req {
+ __u8 emphasis;
+ __u8 ch_spacing;
+ __u8 rds_std;
+ __u8 hlsi;
+ __u32 band_low_limit;
+ __u32 band_high_limit;
+} __packed;
+
+struct hci_fm_mute_mode_req {
+ __u8 hard_mute;
+ __u8 soft_mute;
+} __packed;
+
+struct hci_fm_stereo_mode_req {
+ __u8 stereo_mode;
+ __u8 sig_blend;
+ __u8 intf_blend;
+ __u8 most_switch;
+} __packed;
+
+struct hci_fm_search_station_req {
+ __u8 srch_mode;
+ __u8 scan_time;
+ __u8 srch_dir;
+} __packed;
+
+struct hci_fm_search_rds_station_req {
+ struct hci_fm_search_station_req srch_station;
+ __u8 srch_pty;
+ __u16 srch_pi;
+} __packed;
+
+struct hci_fm_search_station_list_req {
+ __u8 srch_list_mode;
+ __u8 srch_list_dir;
+ __u32 srch_list_max;
+ __u8 srch_pty;
+} __packed;
+
+struct hci_fm_rds_grp_req {
+ __u32 rds_grp_enable_mask;
+ __u32 rds_buf_size;
+ __u8 en_rds_change_filter;
+} __packed;
+
+struct hci_fm_en_avd_ctrl_req {
+ __u8 no_freqs;
+ __u8 freq_index;
+ __u8 lo_shft;
+ __u16 freq_min;
+ __u16 freq_max;
+} __packed;
+
+struct hci_fm_def_data_rd_req {
+ __u8 mode;
+ __u8 length;
+} __packed;
+
+struct hci_fm_def_data_wr_req {
+ struct hci_fm_def_data_rd_req data_rd;
+ __u8 data[256];
+} __packed;
+
+struct hci_fm_peek_req {
+ __u32 start_addr;
+ __u8 length;
+} __packed;
+
+struct hci_fm_poke_req {
+ struct hci_fm_peek_req peek_req;
+ __u8 data[256];
+} __packed;
+
+struct hci_fm_ssbi_req {
+ __u16 start_addr;
+ __u8 data;
+} __packed;
+
+/*HCI events*/
+#define HCI_EV_TUNE_STATUS 0x01
+#define HCI_EV_RDS_LOCK_STATUS 0x02
+#define HCI_EV_STEREO_STATUS 0x03
+#define HCI_EV_SERVICE_AVAILABLE 0x04
+#define HCI_EV_SEARCH_PROGRESS 0x05
+#define HCI_EV_SEARCH_RDS_PROGRESS 0x06
+#define HCI_EV_SEARCH_LIST_PROGRESS 0x07
+#define HCI_EV_RDS_RX_DATA 0x08
+#define HCI_EV_PROGRAM_SERVICE 0x09
+#define HCI_EV_RADIO_TEXT 0x0A
+#define HCI_EV_FM_AF_LIST 0x0B
+#define HCI_EV_TX_RDS_GRP_AVBLE 0x0C
+#define HCI_EV_TX_RDS_GRP_COMPL 0x0D
+#define HCI_EV_TX_RDS_CONT_GRP_COMPL 0x0E
+#define HCI_EV_CMD_COMPLETE 0x0F
+#define HCI_EV_CMD_STATUS 0x10
+#define HCI_EV_TUNE_COMPLETE 0x11
+#define HCI_EV_SEARCH_COMPLETE 0x12
+#define HCI_EV_SEARCH_RDS_COMPLETE 0x13
+#define HCI_EV_SEARCH_LIST_COMPLETE 0x14
+
+#define HCI_REQ_DONE 0
+#define HCI_REQ_PEND 1
+#define HCI_REQ_CANCELED 2
+#define HCI_REQ_STATUS 3
+
+struct hci_ev_tune_status {
+ __u8 sub_event;
+ __le32 station_freq;
+ __u8 serv_avble;
+ __u8 rssi;
+ __u8 stereo_prg;
+ __u8 rds_sync_status;
+ __u8 mute_mode;
+} __packed;
+
+struct hci_ev_rds_rx_data {
+ __u8 num_rds_grps;
+ __u8 rds_grp_data[12];
+} __packed;
+
+struct hci_ev_prg_service {
+ __le16 pi_prg_id;
+ __u8 pty_prg_type;
+ __u8 ta_prg_code_type;
+ __u8 ta_ann_code_flag;
+ __u8 ms_switch_code_flag;
+ __u8 dec_id_ctrl_code_flag;
+ __u8 ps_num;
+ __u8 prg_service_name[119];
+} __packed;
+
+struct hci_ev_radio_text {
+ __le16 pi_prg_id;
+ __u8 pty_prg_type;
+ __u8 ta_prg_code_type;
+ __u8 txt_ab_flag;
+ __u8 radio_txt[64];
+} __packed;
+
+struct hci_ev_af_list {
+ __le32 tune_freq;
+ __le16 pi_code;
+ __u8 af_size;
+ __u8 af_list[25];
+} __packed;
+
+struct hci_ev_cmd_complete {
+ __u8 num_hci_cmd_pkts;
+ __le16 cmd_opcode;
+} __packed;
+
+struct hci_ev_cmd_status {
+ __u8 status;
+ __u8 num_hci_cmd_pkts;
+ __le16 status_opcode;
+} __packed;
+
+struct hci_ev_srch_st {
+ __le32 station_freq;
+ __u8 rds_cap;
+ __u8 pty;
+ __le16 status_opcode;
+} __packed;
+
+struct hci_ev_srch_list_compl {
+ __u8 status;
+ __u8 num_stations_found;
+ struct hci_ev_srch_st srch_st[20];
+} __packed;
+
+/* ----- HCI Event Response ----- */
+struct hci_fm_conf_rsp {
+ __u8 status;
+ struct hci_fm_recv_conf_req recv_conf_rsp;
+} __packed;
+
+struct hci_fm_sig_threshold_rsp {
+ __u8 status;
+ __u8 sig_threshold;
+} __packed;
+
+struct hci_fm_station_rsp {
+ struct hci_ev_tune_status station_rsp;
+} __packed;
+
+struct hci_fm_prgm_srv_rsp {
+ __u8 status;
+ struct hci_ev_prg_service prg_srv;
+} __packed;
+
+struct hci_fm_radio_txt_rsp {
+ __u8 status;
+ struct hci_ev_radio_text rd_txt;
+} __packed;
+
+struct hci_fm_af_list_rsp {
+ __u8 status;
+ struct hci_ev_af_list rd_txt;
+} __packed;
+
+struct hci_fm_data_rd_rsp {
+ __u8 status;
+ __u8 ret_data_len;
+ __u8 data[256];
+} __packed;
+
+struct hci_fm_feature_list_rsp {
+ __u8 status;
+ __u8 feature_mask;
+} __packed;
+
+struct hci_fm_dbg_param_rsp {
+ __u8 status;
+ __u8 blend;
+ __u8 soft_mute;
+ __u8 inf_blend;
+ __u8 inf_soft_mute;
+ __u8 pilot_pil;
+ __u8 io_verc;
+ __u8 in_det_out;
+} __packed;
+
+/* HCI dev events */
+#define RADIO_HCI_DEV_REG 1
+#define RADIO_HCI_DEV_WRITE 2
+
+#define hci_req_lock(d) mutex_lock(&d->req_lock)
+#define hci_req_unlock(d) mutex_unlock(&d->req_lock)
+
+/*FM states*/
+
+enum radio_state_t {
+ FM_OFF,
+ FM_RECV,
+ FM_TRANS,
+ FM_RESET,
+};
+
+enum v4l2_cid_private_iris_t {
+ V4L2_CID_PRIVATE_IRIS_SRCHMODE = (0x08000000 + 1),
+ V4L2_CID_PRIVATE_IRIS_SCANDWELL,
+ V4L2_CID_PRIVATE_IRIS_SRCHON,
+ V4L2_CID_PRIVATE_IRIS_STATE,
+ V4L2_CID_PRIVATE_IRIS_TRANSMIT_MODE,
+ V4L2_CID_PRIVATE_IRIS_RDSGROUP_MASK,
+ V4L2_CID_PRIVATE_IRIS_REGION,
+ V4L2_CID_PRIVATE_IRIS_SIGNAL_TH,
+ V4L2_CID_PRIVATE_IRIS_SRCH_PTY,
+ V4L2_CID_PRIVATE_IRIS_SRCH_PI,
+ V4L2_CID_PRIVATE_IRIS_SRCH_CNT,
+ V4L2_CID_PRIVATE_IRIS_EMPHASIS,
+ V4L2_CID_PRIVATE_IRIS_RDS_STD,
+ V4L2_CID_PRIVATE_IRIS_SPACING,
+ V4L2_CID_PRIVATE_IRIS_RDSON,
+ V4L2_CID_PRIVATE_IRIS_RDSGROUP_PROC,
+ V4L2_CID_PRIVATE_IRIS_LP_MODE,
+ V4L2_CID_PRIVATE_IRIS_ANTENNA,
+ V4L2_CID_PRIVATE_IRIS_RDSD_BUF,
+ V4L2_CID_PRIVATE_IRIS_PSALL,
+ /*v4l2 Tx controls*/
+ V4L2_CID_PRIVATE_IRIS_TX_SETPSREPEATCOUNT,
+ V4L2_CID_PRIVATE_IRIS_STOP_RDS_TX_PS_NAME,
+ V4L2_CID_PRIVATE_IRIS_STOP_RDS_TX_RT,
+ V4L2_CID_PRIVATE_IRIS_IOVERC,
+ V4L2_CID_PRIVATE_IRIS_INTDET,
+};
+
+enum iris_evt_t {
+ IRIS_EVT_RADIO_READY,
+ IRIS_EVT_TUNE_SUCC,
+ IRIS_EVT_SEEK_COMPLETE,
+ IRIS_EVT_SCAN_NEXT,
+ IRIS_EVT_NEW_RAW_RDS,
+ IRIS_EVT_NEW_RT_RDS,
+ IRIS_EVT_NEW_PS_RDS,
+ IRIS_EVT_ERROR,
+ IRIS_EVT_BELOW_TH,
+ IRIS_EVT_ABOVE_TH,
+ IRIS_EVT_STEREO,
+ IRIS_EVT_MONO,
+ IRIS_EVT_RDS_AVAIL,
+ IRIS_EVT_RDS_NOT_AVAIL,
+ IRIS_EVT_NEW_SRCH_LIST,
+ IRIS_EVT_NEW_AF_LIST,
+ IRIS_EVT_TXRDSDAT,
+ IRIS_EVT_TXRDSDONE
+};
+
+enum iris_region_t {
+ IRIS_REGION_US,
+ IRIS_REGION_EU,
+ IRIS_REGION_JAPAN,
+ IRIS_REGION_JAPAN_WIDE,
+ IRIS_REGION_OTHER
+};
+
+#define STD_BUF_SIZE (64)
+
+enum iris_buf_t {
+ IRIS_BUF_SRCH_LIST,
+ IRIS_BUF_EVENTS,
+ IRIS_BUF_RT_RDS,
+ IRIS_BUF_PS_RDS,
+ IRIS_BUF_RAW_RDS,
+ IRIS_BUF_AF_LIST,
+ IRIS_BUF_MAX
+};
+
+enum iris_xfr_t {
+ IRIS_XFR_SYNC,
+ IRIS_XFR_ERROR,
+ IRIS_XFR_SRCH_LIST,
+ IRIS_XFR_RT_RDS,
+ IRIS_XFR_PS_RDS,
+ IRIS_XFR_AF_LIST,
+ IRIS_XFR_MAX
+};
+
+#undef FMDBG
+#ifdef FM_DEBUG
+#define FMDBG(fmt, args...) pr_info("iris_radio: " fmt, ##args)
+#else
+#define FMDBG(fmt, args...)
+#endif
+
+#undef FMDERR
+#define FMDERR(fmt, args...) pr_err("iris_radio: " fmt, ##args)
+
+/* Search options */
+enum search_t {
+ SEEK,
+ SCAN,
+ SCAN_FOR_STRONG,
+ SCAN_FOR_WEAK,
+ RDS_SEEK_PTY,
+ RDS_SCAN_PTY,
+ RDS_SEEK_PI,
+ RDS_AF_JUMP,
+};
+
+#define SRCH_MODE 0x07
+#define SRCH_DIR 0x08 /* 0-up 1-down */
+#define SCAN_DWELL 0x70
+#define SRCH_ON 0x80
+
+/* I/O Control */
+#define IOC_HRD_MUTE 0x03
+#define IOC_SFT_MUTE 0x01
+#define IOC_MON_STR 0x01
+#define IOC_SIG_BLND 0x01
+#define IOC_INTF_BLND 0x01
+#define IOC_ANTENNA 0x01
+
+/* RDS Control */
+#define RDS_ON 0x01
+#define RDS_BUF_SZ 100
+
+/* Search direction */
+#define SRCH_DIR_UP (0)
+#define SRCH_DIR_DOWN (1)
+
+/* control options */
+#define CTRL_ON (1)
+#define CTRL_OFF (0)
+
+int hci_def_data_read(struct hci_fm_def_data_rd_req *arg,
+ struct radio_hci_dev *hdev);
+int hci_def_data_write(struct hci_fm_def_data_wr_req *arg,
+ struct radio_hci_dev *hdev);
+int hci_fm_do_calibration(__u8 *arg, struct radio_hci_dev *hdev);
+int hci_fm_do_calibration(__u8 *arg, struct radio_hci_dev *hdev);
+int hci_peek_data(struct hci_fm_peek_req *arg, struct radio_hci_dev *hdev);
+int hci_poke_data(struct hci_fm_poke_req *arg, struct radio_hci_dev *hdev);
+int hci_poke_data(struct hci_fm_poke_req *arg, struct radio_hci_dev *hdev);
+int hci_poke_data(struct hci_fm_poke_req *arg, struct radio_hci_dev *hdev);
+
+#endif /* __RADIO_HCI_CORE_H */
diff --git a/include/media/tavarua.h b/include/media/tavarua.h
new file mode 100644
index 0000000..b82ec58
--- /dev/null
+++ b/include/media/tavarua.h
@@ -0,0 +1,417 @@
+#ifndef __LINUX_TAVARUA_H
+#define __LINUX_TAVARUA_H
+
+#ifdef __KERNEL__
+#include <linux/types.h>
+#include <asm/sizes.h>
+#else
+#include <stdint.h>
+#endif
+#include <linux/ioctl.h>
+#include <linux/videodev2.h>
+
+
+#undef FM_DEBUG
+
+/* constants */
+#define RDS_BLOCKS_NUM (4)
+#define BYTES_PER_BLOCK (3)
+#define MAX_PS_LENGTH (96)
+#define MAX_RT_LENGTH (64)
+
+#define XFRDAT0 (0x20)
+#define XFRDAT1 (0x21)
+#define XFRDAT2 (0x22)
+
+#define INTDET_PEEK_MSB (0x88)
+#define INTDET_PEEK_LSB (0x26)
+
+#define RMSSI_PEEK_MSB (0x88)
+#define RMSSI_PEEK_LSB (0xA8)
+
+#define MPX_DCC_BYPASS_POKE_MSB (0x88)
+#define MPX_DCC_BYPASS_POKE_LSB (0xC0)
+
+#define MPX_DCC_PEEK_MSB_REG1 (0x88)
+#define MPX_DCC_PEEK_LSB_REG1 (0xC2)
+
+#define MPX_DCC_PEEK_MSB_REG2 (0x88)
+#define MPX_DCC_PEEK_LSB_REG2 (0xC3)
+
+#define MPX_DCC_PEEK_MSB_REG3 (0x88)
+#define MPX_DCC_PEEK_LSB_REG3 (0xC4)
+
+/* Standard buffer size */
+#define STD_BUF_SIZE (64)
+/* Search direction */
+#define SRCH_DIR_UP (0)
+#define SRCH_DIR_DOWN (1)
+
+/* control options */
+#define CTRL_ON (1)
+#define CTRL_OFF (0)
+
+#define US_LOW_BAND (87.5)
+#define US_HIGH_BAND (108)
+
+/* constant for Tx */
+
+#define MASK_PI (0x0000FFFF)
+#define MASK_PI_MSB (0x0000FF00)
+#define MASK_PI_LSB (0x000000FF)
+#define MASK_PTY (0x0000001F)
+#define MASK_TXREPCOUNT (0x0000000F)
+
+#undef FMDBG
+#ifdef FM_DEBUG
+ #define FMDBG(fmt, args...) printk(KERN_INFO "tavarua_radio: " fmt, ##args)
+#else
+ #define FMDBG(fmt, args...)
+#endif
+
+#undef FMDERR
+#define FMDERR(fmt, args...) printk(KERN_INFO "tavarua_radio: " fmt, ##args)
+
+#undef FMDBG_I2C
+#ifdef FM_DEBUG_I2C
+ #define FMDBG_I2C(fmt, args...) printk(KERN_INFO "fm_i2c: " fmt, ##args)
+#else
+ #define FMDBG_I2C(fmt, args...)
+#endif
+
+/* function declarations */
+/* FM Core audio paths. */
+#define TAVARUA_AUDIO_OUT_ANALOG_OFF (0)
+#define TAVARUA_AUDIO_OUT_ANALOG_ON (1)
+#define TAVARUA_AUDIO_OUT_DIGITAL_OFF (0)
+#define TAVARUA_AUDIO_OUT_DIGITAL_ON (1)
+
+int tavarua_set_audio_path(int digital_on, int analog_on);
+
+/* defines and enums*/
+
+#define MARIMBA_A0 0x01010013
+#define MARIMBA_2_1 0x02010204
+#define BAHAMA_1_0 0x0302010A
+#define BAHAMA_2_0 0x04020205
+#define WAIT_TIMEOUT 2000
+#define RADIO_INIT_TIME 15
+#define TAVARUA_DELAY 10
+/*
+ * The frequency is set in units of 62.5 Hz when using V4L2_TUNER_CAP_LOW,
+ * 62.5 kHz otherwise.
+ * The tuner is able to have a channel spacing of 50, 100 or 200 kHz.
+ * tuner->capability is therefore set to V4L2_TUNER_CAP_LOW
+ * The FREQ_MUL is then: 1 MHz / 62.5 Hz = 16000
+ */
+#define FREQ_MUL (1000000 / 62.5)
+
+enum v4l2_cid_private_tavarua_t {
+ V4L2_CID_PRIVATE_TAVARUA_SRCHMODE = (V4L2_CID_PRIVATE_BASE + 1),
+ V4L2_CID_PRIVATE_TAVARUA_SCANDWELL,
+ V4L2_CID_PRIVATE_TAVARUA_SRCHON,
+ V4L2_CID_PRIVATE_TAVARUA_STATE,
+ V4L2_CID_PRIVATE_TAVARUA_TRANSMIT_MODE,
+ V4L2_CID_PRIVATE_TAVARUA_RDSGROUP_MASK,
+ V4L2_CID_PRIVATE_TAVARUA_REGION,
+ V4L2_CID_PRIVATE_TAVARUA_SIGNAL_TH,
+ V4L2_CID_PRIVATE_TAVARUA_SRCH_PTY,
+ V4L2_CID_PRIVATE_TAVARUA_SRCH_PI,
+ V4L2_CID_PRIVATE_TAVARUA_SRCH_CNT,
+ V4L2_CID_PRIVATE_TAVARUA_EMPHASIS,
+ V4L2_CID_PRIVATE_TAVARUA_RDS_STD,
+ V4L2_CID_PRIVATE_TAVARUA_SPACING,
+ V4L2_CID_PRIVATE_TAVARUA_RDSON,
+ V4L2_CID_PRIVATE_TAVARUA_RDSGROUP_PROC,
+ V4L2_CID_PRIVATE_TAVARUA_LP_MODE,
+ V4L2_CID_PRIVATE_TAVARUA_ANTENNA,
+ V4L2_CID_PRIVATE_TAVARUA_RDSD_BUF,
+ V4L2_CID_PRIVATE_TAVARUA_PSALL,
+ /*v4l2 Tx controls*/
+ V4L2_CID_PRIVATE_TAVARUA_TX_SETPSREPEATCOUNT,
+ V4L2_CID_PRIVATE_TAVARUA_STOP_RDS_TX_PS_NAME,
+ V4L2_CID_PRIVATE_TAVARUA_STOP_RDS_TX_RT,
+ V4L2_CID_PRIVATE_TAVARUA_IOVERC,
+ V4L2_CID_PRIVATE_TAVARUA_INTDET,
+ V4L2_CID_PRIVATE_TAVARUA_MPX_DCC,
+};
+
+enum tavarua_buf_t {
+ TAVARUA_BUF_SRCH_LIST,
+ TAVARUA_BUF_EVENTS,
+ TAVARUA_BUF_RT_RDS,
+ TAVARUA_BUF_PS_RDS,
+ TAVARUA_BUF_RAW_RDS,
+ TAVARUA_BUF_AF_LIST,
+ TAVARUA_BUF_MAX
+};
+
+enum tavarua_xfr_t {
+ TAVARUA_XFR_SYNC,
+ TAVARUA_XFR_ERROR,
+ TAVARUA_XFR_SRCH_LIST,
+ TAVARUA_XFR_RT_RDS,
+ TAVARUA_XFR_PS_RDS,
+ TAVARUA_XFR_AF_LIST,
+ TAVARUA_XFR_MAX
+};
+
+/* offsets */
+#define RAW_RDS 0x0F
+#define RDS_BLOCK 3
+
+/* registers*/
+#define MARIMBA_XO_BUFF_CNTRL 0x07
+#define RADIO_REGISTERS 0x30
+#define XFR_REG_NUM 16
+#define STATUS_REG_NUM 3
+
+/* TX constants */
+#define HEADER_SIZE 4
+#define TX_ON 0x80
+#define TAVARUA_TX_RT RDS_RT_0
+#define TAVARUA_TX_PS RDS_PS_0
+
+enum register_t {
+ STATUS_REG1 = 0,
+ STATUS_REG2,
+ STATUS_REG3,
+ RDCTRL,
+ FREQ,
+ TUNECTRL,
+ SRCHRDS1,
+ SRCHRDS2,
+ SRCHCTRL,
+ IOCTRL,
+ RDSCTRL,
+ ADVCTRL,
+ AUDIOCTRL,
+ RMSSI,
+ IOVERC,
+ AUDIOIND = 0x1E,
+ XFRCTRL,
+ FM_CTL0 = 0xFF,
+ LEAKAGE_CNTRL = 0xFE,
+};
+#define BAHAMA_RBIAS_CTL1 0x07
+#define BAHAMA_FM_MODE_REG 0xFD
+#define BAHAMA_FM_CTL1_REG 0xFE
+#define BAHAMA_FM_CTL0_REG 0xFF
+#define BAHAMA_FM_MODE_NORMAL 0x00
+#define BAHAMA_LDO_DREG_CTL0 0xF0
+#define BAHAMA_LDO_AREG_CTL0 0xF4
+
+/* Radio Control */
+#define RDCTRL_STATE_OFFSET 0
+#define RDCTRL_STATE_MASK (3 << RDCTRL_STATE_OFFSET)
+#define RDCTRL_BAND_OFFSET 2
+#define RDCTRL_BAND_MASK (1 << RDCTRL_BAND_OFFSET)
+#define RDCTRL_CHSPACE_OFFSET 3
+#define RDCTRL_CHSPACE_MASK (3 << RDCTRL_CHSPACE_OFFSET)
+#define RDCTRL_DEEMPHASIS_OFFSET 5
+#define RDCTRL_DEEMPHASIS_MASK (1 << RDCTRL_DEEMPHASIS_OFFSET)
+#define RDCTRL_HLSI_OFFSET 6
+#define RDCTRL_HLSI_MASK (3 << RDCTRL_HLSI_OFFSET)
+
+/* Tune Control */
+#define TUNE_STATION 0x01
+#define ADD_OFFSET (1 << 1)
+#define SIGSTATE (1 << 5)
+#define MOSTSTATE (1 << 6)
+#define RDSSYNC (1 << 7)
+/* Search Control */
+#define SRCH_MODE_OFFSET 0
+#define SRCH_MODE_MASK (7 << SRCH_MODE_OFFSET)
+#define SRCH_DIR_OFFSET 3
+#define SRCH_DIR_MASK (1 << SRCH_DIR_OFFSET)
+#define SRCH_DWELL_OFFSET 4
+#define SRCH_DWELL_MASK (7 << SRCH_DWELL_OFFSET)
+#define SRCH_STATE_OFFSET 7
+#define SRCH_STATE_MASK (1 << SRCH_STATE_OFFSET)
+
+/* I/O Control */
+#define IOC_HRD_MUTE 0x03
+#define IOC_SFT_MUTE (1 << 2)
+#define IOC_MON_STR (1 << 3)
+#define IOC_SIG_BLND (1 << 4)
+#define IOC_INTF_BLND (1 << 5)
+#define IOC_ANTENNA (1 << 6)
+#define IOC_ANTENNA_OFFSET 6
+#define IOC_ANTENNA_MASK (1 << IOC_ANTENNA_OFFSET)
+
+/* RDS Control */
+#define RDS_ON 0x01
+#define RDSCTRL_STANDARD_OFFSET 1
+#define RDSCTRL_STANDARD_MASK (1 << RDSCTRL_STANDARD_OFFSET)
+
+/* Advanced features controls */
+#define RDSRTEN (1 << 3)
+#define RDSPSEN (1 << 4)
+
+/* Audio path control */
+#define AUDIORX_ANALOG_OFFSET 0
+#define AUDIORX_ANALOG_MASK (1 << AUDIORX_ANALOG_OFFSET)
+#define AUDIORX_DIGITAL_OFFSET 1
+#define AUDIORX_DIGITAL_MASK (1 << AUDIORX_DIGITAL_OFFSET)
+#define AUDIOTX_OFFSET 2
+#define AUDIOTX_MASK (1 << AUDIOTX_OFFSET)
+#define I2SCTRL_OFFSET 3
+#define I2SCTRL_MASK (1 << I2SCTRL_OFFSET)
+
+/* Search options */
+enum search_t {
+ SEEK,
+ SCAN,
+ SCAN_FOR_STRONG,
+ SCAN_FOR_WEAK,
+ RDS_SEEK_PTY,
+ RDS_SCAN_PTY,
+ RDS_SEEK_PI,
+ RDS_AF_JUMP,
+};
+
+#define SRCH_MODE 0x07
+#define SRCH_DIR 0x08 /* 0-up 1-down */
+#define SCAN_DWELL 0x70
+#define SRCH_ON 0x80
+
+/* RDS CONFIG */
+#define RDS_CONFIG_PSALL 0x01
+
+#define FM_ENABLE 0x22
+#define SET_REG_FIELD(reg, val, offset, mask) \
+ (reg = (reg & ~mask) | (((val) << offset) & mask))
+#define GET_REG_FIELD(reg, offset, mask) ((reg & mask) >> offset)
+
+enum radio_state_t {
+ FM_OFF,
+ FM_RECV,
+ FM_TRANS,
+ FM_RESET,
+};
+
+#define XFRCTRL_WRITE (1 << 7)
+
+/* Interrupt status */
+
+/* interrupt register 1 */
+#define READY (1 << 0) /* Radio ready after powerup or reset */
+#define TUNE (1 << 1) /* Tune completed */
+#define SEARCH (1 << 2) /* Search completed (read FREQ) */
+#define SCANNEXT (1 << 3) /* Scanning for next station */
+#define SIGNAL (1 << 4) /* Signal indicator change (read SIGSTATE) */
+#define INTF (1 << 5) /* Interference cnt has fallen outside range */
+#define SYNC (1 << 6) /* RDS sync state change (read RDSSYNC) */
+#define AUDIO (1 << 7) /* Audio Control indicator (read AUDIOIND) */
+
+/* interrupt register 2 */
+#define RDSDAT (1 << 0) /* New unread RDS data group available */
+#define BLOCKB (1 << 1) /* Block-B match condition exists */
+#define PROGID (1 << 2) /* Block-A or Block-C matched stored PI value*/
+#define RDSPS (1 << 3) /* New RDS Program Service Table available */
+#define RDSRT (1 << 4) /* New RDS Radio Text available */
+#define RDSAF (1 << 5) /* New RDS AF List available */
+#define TXRDSDAT (1 << 6) /* Transmitted an RDS group */
+#define TXRDSDONE (1 << 7) /* RDS raw group one-shot transmit completed */
+
+/* interrupt register 3 */
+#define TRANSFER (1 << 0) /* Data transfer (XFR) completed */
+#define RDSPROC (1 << 1) /* Dynamic RDS Processing complete */
+#define ERROR (1 << 7) /* Err occurred.Read code to determine cause */
+
+
+#define FM_TX_PWR_LVL_0 0 /* Lowest power lvl that can be set for Tx */
+#define FM_TX_PWR_LVL_MAX 7 /* Max power lvl for Tx */
+/* Transfer */
+enum tavarua_xfr_ctrl_t {
+ RDS_PS_0 = 0x01,
+ RDS_PS_1,
+ RDS_PS_2,
+ RDS_PS_3,
+ RDS_PS_4,
+ RDS_PS_5,
+ RDS_PS_6,
+ RDS_RT_0,
+ RDS_RT_1,
+ RDS_RT_2,
+ RDS_RT_3,
+ RDS_RT_4,
+ RDS_AF_0,
+ RDS_AF_1,
+ RDS_CONFIG,
+ RDS_TX_GROUPS,
+ RDS_COUNT_0,
+ RDS_COUNT_1,
+ RDS_COUNT_2,
+ RADIO_CONFIG,
+ RX_CONFIG,
+ RX_TIMERS,
+ RX_STATIONS_0,
+ RX_STATIONS_1,
+ INT_CTRL,
+ ERROR_CODE,
+ CHIPID,
+ CAL_DAT_0 = 0x20,
+ CAL_DAT_1,
+ CAL_DAT_2,
+ CAL_DAT_3,
+ CAL_CFG_0,
+ CAL_CFG_1,
+ DIG_INTF_0,
+ DIG_INTF_1,
+ DIG_AGC_0,
+ DIG_AGC_1,
+ DIG_AGC_2,
+ DIG_AUDIO_0,
+ DIG_AUDIO_1,
+ DIG_AUDIO_2,
+ DIG_AUDIO_3,
+ DIG_AUDIO_4,
+ DIG_RXRDS,
+ DIG_DCC,
+ DIG_SPUR,
+ DIG_MPXDCC,
+ DIG_PILOT,
+ DIG_DEMOD,
+ DIG_MOST,
+ DIG_TX_0,
+ DIG_TX_1,
+ PHY_TXGAIN = 0x3B,
+ PHY_CONFIG,
+ PHY_TXBLOCK,
+ PHY_TCB,
+ XFR_PEEK_MODE = 0x40,
+ XFR_POKE_MODE = 0xC0,
+ TAVARUA_XFR_CTRL_MAX
+};
+
+enum tavarua_evt_t {
+ TAVARUA_EVT_RADIO_READY,
+ TAVARUA_EVT_TUNE_SUCC,
+ TAVARUA_EVT_SEEK_COMPLETE,
+ TAVARUA_EVT_SCAN_NEXT,
+ TAVARUA_EVT_NEW_RAW_RDS,
+ TAVARUA_EVT_NEW_RT_RDS,
+ TAVARUA_EVT_NEW_PS_RDS,
+ TAVARUA_EVT_ERROR,
+ TAVARUA_EVT_BELOW_TH,
+ TAVARUA_EVT_ABOVE_TH,
+ TAVARUA_EVT_STEREO,
+ TAVARUA_EVT_MONO,
+ TAVARUA_EVT_RDS_AVAIL,
+ TAVARUA_EVT_RDS_NOT_AVAIL,
+ TAVARUA_EVT_NEW_SRCH_LIST,
+ TAVARUA_EVT_NEW_AF_LIST,
+ TAVARUA_EVT_TXRDSDAT,
+ TAVARUA_EVT_TXRDSDONE
+};
+
+enum tavarua_region_t {
+ TAVARUA_REGION_US,
+ TAVARUA_REGION_EU,
+ TAVARUA_REGION_JAPAN,
+ TAVARUA_REGION_JAPAN_WIDE,
+ TAVARUA_REGION_OTHER
+};
+
+#endif /* __LINUX_TAVARUA_H */
diff --git a/include/media/videobuf-msm-mem.h b/include/media/videobuf-msm-mem.h
new file mode 100644
index 0000000..19dd93e
--- /dev/null
+++ b/include/media/videobuf-msm-mem.h
@@ -0,0 +1,46 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * helper functions for physically contiguous PMEM capture buffers
+ */
+
+#ifndef _VIDEOBUF_PMEM_CONTIG_H
+#define _VIDEOBUF_PMEM_CONTIG_H
+
+#include <media/videobuf-core.h>
+
+struct videobuf_contig_pmem {
+ u32 magic;
+ void *vaddr;
+ int phyaddr;
+ unsigned long size;
+ int is_userptr;
+ uint32_t y_off;
+ uint32_t cbcr_off;
+ int buffer_type;
+ struct file *file;
+};
+
+void videobuf_queue_pmem_contig_init(struct videobuf_queue *q,
+ const struct videobuf_queue_ops *ops,
+ struct device *dev,
+ spinlock_t *irqlock,
+ enum v4l2_buf_type type,
+ enum v4l2_field field,
+ unsigned int msize,
+ void *priv,
+ struct mutex *ext_lock);
+
+int videobuf_to_pmem_contig(struct videobuf_buffer *buf);
+int videobuf_pmem_contig_free(struct videobuf_queue *q,
+ struct videobuf_buffer *buf);
+
+#endif /* _VIDEOBUF_PMEM_CONTIG_H */