commit 442d78a71ab3551d898cd936f320201e0ca193d4
author Tianyi Gou <tgou@codeaurora.org> Tue Feb 05 18:27:32 2013 -0800
committer Gerrit - the friendly Code Review server <code-review@localhost> Wed Feb 13 13:51:43 2013 -0800
tree b2bad26f4b90244ad2f2bf5cc5fe06151163c171
parent 8aa33a7254dbbd180b89a8f2ee9ba96a823241d1

msm: acpuclock-8930ab: Lower VDD_DIG voltage vote for L2 at 384MHz

New characterization data shows that vdd_dig voltage for L2@384MHz
can be lowered to the low level. Update the data in this patch.

Change-Id: Ia80ee9397b3b433b96f2bce49a86d5ef7b024fc5
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
(cherry picked from commit f684b386cbe45229e12a0eb778b933c69bceb0d4)
Signed-off-by: Neha Pandey <nehap@codeaurora.org>

arch/arm/mach-msm/acpuclock-8930ab.c

diff --git a/arch/arm/mach-msm/acpuclock-8930ab.c b/arch/arm/mach-msm/acpuclock-8930ab.c
index 55de66a..d15acf1 100644
--- a/arch/arm/mach-msm/acpuclock-8930ab.c
+++ b/arch/arm/mach-msm/acpuclock-8930ab.c
@@ -130,9 +130,8 @@
 	.name = "acpuclk-8930ab",
 };
 
-/* TODO: Update new L2 freqs once they are available */
 static struct l2_level l2_freq_tbl[] __initdata = {
-	[0]  = { {  384000, PLL_8, 0, 0x00 },  LVL_NOM, 1050000, 1 },
+	[0]  = { {  384000, PLL_8, 0, 0x00 },  LVL_LOW, 1050000, 1 },
 	[1]  = { {  432000, HFPLL, 2, 0x20 },  LVL_NOM, 1050000, 2 },
 	[2]  = { {  486000, HFPLL, 2, 0x24 },  LVL_NOM, 1050000, 2 },
 	[3]  = { {  540000, HFPLL, 2, 0x28 },  LVL_NOM, 1050000, 2 },